\r
#include <Chipset/ArmV7.h>\r
\r
-#define __EFI_MEMORY_RWX 0 // no restrictions\r
+#define __EFI_MEMORY_RWX 0 // no restrictions\r
\r
-#define CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | \\r
+#define CACHE_ATTRIBUTE_MASK (EFI_MEMORY_UC | \\r
EFI_MEMORY_WC | \\r
EFI_MEMORY_WT | \\r
EFI_MEMORY_WB | \\r
IN EFI_PHYSICAL_ADDRESS BaseAddress\r
)\r
{\r
- UINT32 FirstLevelIdx;\r
- UINT32 SectionDescriptor;\r
- UINT32 PageTableDescriptor;\r
- UINT32 PageDescriptor;\r
- UINT32 Index;\r
+ UINT32 FirstLevelIdx;\r
+ UINT32 SectionDescriptor;\r
+ UINT32 PageTableDescriptor;\r
+ UINT32 PageDescriptor;\r
+ UINT32 Index;\r
\r
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
- volatile ARM_PAGE_TABLE_ENTRY *PageTable;\r
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
+ volatile ARM_PAGE_TABLE_ENTRY *PageTable;\r
\r
DEBUG ((DEBUG_PAGE, "Converting section at 0x%x to pages\n", (UINTN)BaseAddress));\r
\r
FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();\r
\r
// Calculate index into first level translation table for start of modification\r
- FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
+ FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);\r
\r
// Get section attributes and convert to page attributes\r
SectionDescriptor = FirstLevelTable[FirstLevelIdx];\r
- PageDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (SectionDescriptor, FALSE);\r
+ PageDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (SectionDescriptor, FALSE);\r
\r
// Allocate a page table for the 4KB entries (we use up a full page even though we only need 1KB)\r
PageTable = (volatile ARM_PAGE_TABLE_ENTRY *)AllocatePages (1);\r
\r
// Write the page table entries out\r
for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {\r
- PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (Index << 12)) | PageDescriptor;\r
+ PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (BaseAddress + (Index << 12)) | PageDescriptor;\r
}\r
\r
// Formulate page table entry, Domain=0, NS=0\r
STATIC\r
EFI_STATUS\r
UpdatePageEntries (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINT64 Attributes,\r
- OUT BOOLEAN *FlushTlbs OPTIONAL\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT64 Attributes,\r
+ OUT BOOLEAN *FlushTlbs OPTIONAL\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 EntryValue;\r
- UINT32 EntryMask;\r
- UINT32 FirstLevelIdx;\r
- UINT32 Offset;\r
- UINT32 NumPageEntries;\r
- UINT32 Descriptor;\r
- UINT32 p;\r
- UINT32 PageTableIndex;\r
- UINT32 PageTableEntry;\r
- UINT32 CurrentPageTableEntry;\r
- VOID *Mva;\r
-\r
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
- volatile ARM_PAGE_TABLE_ENTRY *PageTable;\r
+ EFI_STATUS Status;\r
+ UINT32 EntryValue;\r
+ UINT32 EntryMask;\r
+ UINT32 FirstLevelIdx;\r
+ UINT32 Offset;\r
+ UINT32 NumPageEntries;\r
+ UINT32 Descriptor;\r
+ UINT32 p;\r
+ UINT32 PageTableIndex;\r
+ UINT32 PageTableEntry;\r
+ UINT32 CurrentPageTableEntry;\r
+ VOID *Mva;\r
+\r
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
+ volatile ARM_PAGE_TABLE_ENTRY *PageTable;\r
\r
Status = EFI_SUCCESS;\r
\r
\r
// Iterate for the number of 4KB pages to change\r
Offset = 0;\r
- for(p = 0; p < NumPageEntries; p++) {\r
+ for (p = 0; p < NumPageEntries; p++) {\r
// Calculate index into first level translation table for page table value\r
\r
- FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
+ FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);\r
\r
// Read the descriptor from the first level page table\r
Descriptor = FirstLevelTable[FirstLevelIdx];\r
\r
// Does this descriptor need to be converted from section entry to 4K pages?\r
- if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Descriptor)) {\r
+ if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (Descriptor)) {\r
Status = ConvertSectionToPages (FirstLevelIdx << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
// Exit for loop\r
break;\r
}\r
}\r
\r
// Obtain page table base address\r
- PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS(Descriptor);\r
+ PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS (Descriptor);\r
\r
// Calculate index into the page table\r
PageTableIndex = ((BaseAddress + Offset) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;\r
ArmUpdateTranslationTableEntry ((VOID *)&PageTable[PageTableIndex], Mva);\r
}\r
\r
- Status = EFI_SUCCESS;\r
+ Status = EFI_SUCCESS;\r
Offset += TT_DESCRIPTOR_PAGE_SIZE;\r
-\r
} // End first level translation table loop\r
\r
return Status;\r
STATIC\r
EFI_STATUS\r
UpdateSectionEntries (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINT64 Attributes\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT64 Attributes\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 EntryMask;\r
- UINT32 EntryValue;\r
- UINT32 FirstLevelIdx;\r
- UINT32 NumSections;\r
- UINT32 i;\r
- UINT32 CurrentDescriptor;\r
- UINT32 Descriptor;\r
- VOID *Mva;\r
- volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
+ EFI_STATUS Status;\r
+ UINT32 EntryMask;\r
+ UINT32 EntryValue;\r
+ UINT32 FirstLevelIdx;\r
+ UINT32 NumSections;\r
+ UINT32 i;\r
+ UINT32 CurrentDescriptor;\r
+ UINT32 Descriptor;\r
+ VOID *Mva;\r
+ volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
\r
Status = EFI_SUCCESS;\r
\r
FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();\r
\r
// calculate index into first level translation table for start of modification\r
- FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
+ FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);\r
\r
// calculate number of 1MB first level entries this applies to\r
NumSections = (UINT32)(Length / TT_DESCRIPTOR_SECTION_SIZE);\r
\r
// iterate through each descriptor\r
- for(i=0; i<NumSections; i++) {\r
+ for (i = 0; i < NumSections; i++) {\r
CurrentDescriptor = FirstLevelTable[FirstLevelIdx + i];\r
\r
// has this descriptor already been converted to pages?\r
- if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(CurrentDescriptor)) {\r
+ if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (CurrentDescriptor)) {\r
// forward this 1MB range to page table function instead\r
Status = UpdatePageEntries (\r
(FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT,\r
TT_DESCRIPTOR_SECTION_SIZE,\r
Attributes,\r
- NULL);\r
+ NULL\r
+ );\r
} else {\r
// still a section entry\r
\r
\r
EFI_STATUS\r
ArmSetMemoryAttributes (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINT64 Attributes\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT64 Attributes\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 ChunkLength;\r
- BOOLEAN FlushTlbs;\r
+ EFI_STATUS Status;\r
+ UINT64 ChunkLength;\r
+ BOOLEAN FlushTlbs;\r
\r
if (BaseAddress > (UINT64)MAX_ADDRESS) {\r
return EFI_UNSUPPORTED;\r
FlushTlbs = FALSE;\r
while (Length > 0) {\r
if ((BaseAddress % TT_DESCRIPTOR_SECTION_SIZE == 0) &&\r
- Length >= TT_DESCRIPTOR_SECTION_SIZE) {\r
-\r
+ (Length >= TT_DESCRIPTOR_SECTION_SIZE))\r
+ {\r
ChunkLength = Length - Length % TT_DESCRIPTOR_SECTION_SIZE;\r
\r
- DEBUG ((DEBUG_PAGE,\r
+ DEBUG ((\r
+ DEBUG_PAGE,\r
"SetMemoryAttributes(): MMU section 0x%lx length 0x%lx to %lx\n",\r
- BaseAddress, ChunkLength, Attributes));\r
+ BaseAddress,\r
+ ChunkLength,\r
+ Attributes\r
+ ));\r
\r
Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes);\r
\r
FlushTlbs = TRUE;\r
} else {\r
-\r
//\r
// Process page by page until the next section boundary, but only if\r
// we have more than a section's worth of area to deal with after that.\r
ChunkLength = Length;\r
}\r
\r
- DEBUG ((DEBUG_PAGE,\r
+ DEBUG ((\r
+ DEBUG_PAGE,\r
"SetMemoryAttributes(): MMU page 0x%lx length 0x%lx to %lx\n",\r
- BaseAddress, ChunkLength, Attributes));\r
+ BaseAddress,\r
+ ChunkLength,\r
+ Attributes\r
+ ));\r
\r
- Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes,\r
- &FlushTlbs);\r
+ Status = UpdatePageEntries (\r
+ BaseAddress,\r
+ ChunkLength,\r
+ Attributes,\r
+ &FlushTlbs\r
+ );\r
}\r
\r
if (EFI_ERROR (Status)) {\r
}\r
\r
BaseAddress += ChunkLength;\r
- Length -= ChunkLength;\r
+ Length -= ChunkLength;\r
}\r
\r
if (FlushTlbs) {\r
ArmInvalidateTlb ();\r
}\r
+\r
return Status;\r
}\r
\r
EFI_STATUS\r
ArmSetMemoryRegionNoExec (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_XP);\r
\r
EFI_STATUS\r
ArmClearMemoryRegionNoExec (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);\r
\r
EFI_STATUS\r
ArmSetMemoryRegionReadOnly (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
return ArmSetMemoryAttributes (BaseAddress, Length, EFI_MEMORY_RO);\r
\r
EFI_STATUS\r
ArmClearMemoryRegionReadOnly (\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
)\r
{\r
return ArmSetMemoryAttributes (BaseAddress, Length, __EFI_MEMORY_RWX);\r
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