UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / ArmPkg / Library / CompilerIntrinsicsLib / Arm / divsi3.S

diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S
index 3976fda1486298ea8f1bc2cc9f73404d6a893850..45c0fcc3f759f0bef5dc6ca18695869a2ab1a61e 100644 (file)
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S
@@ -1,32 +1,24 @@
-#------------------------------------------------------------------------------ 
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-  .text
-  .align 2
-  GCC_ASM_EXPORT(__divsi3)
-  
-ASM_PFX(__divsi3):
-  eor  r3, r0, r0, asr #31
-  eor  r2, r1, r1, asr #31
-  stmfd  sp!, {r4, r5, r7, lr}
-  mov  r5, r0, asr #31
-  add  r7, sp, #8
-  mov  r4, r1, asr #31
-  sub  r0, r3, r0, asr #31
-  sub  r1, r2, r1, asr #31
-  bl  ASM_PFX(__udivsi3)
-  eor  r1, r5, r4
-  eor  r0, r0, r1
-  rsb  r0, r1, r0
-  ldmfd  sp!, {r4, r5, r7, pc}
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+#\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+\r
+ASM_FUNC(__divsi3)\r
+  eor  r3, r0, r0, asr #31\r
+  eor  r2, r1, r1, asr #31\r
+  stmfd  sp!, {r4, r5, r7, lr}\r
+  mov  r5, r0, asr #31\r
+  add  r7, sp, #8\r
+  mov  r4, r1, asr #31\r
+  sub  r0, r3, r0, asr #31\r
+  sub  r1, r2, r1, asr #31\r
+  bl  ASM_PFX(__udivsi3)\r
+  eor  r1, r5, r4\r
+  eor  r0, r0, r1\r
+  rsb  r0, r1, r0\r
+  ldmfd  sp!, {r4, r5, r7, pc}\r