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[mirror_edk2.git] / ArmPkg / Library / CompilerIntrinsicsLib / Arm / udivsi3.S

diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S
index bfe2006151fa1261a7c505e2c289534da95cc010..92c9cad960177927ab70d355a69ad67e6060b84a 100644 (file)
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S
@@ -1,8 +1,8 @@
 #------------------------------------------------------------------------------ 
 #
-# Copyright (c) 2008-2009 Apple Inc. All rights reserved.
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
 #
-# All rights reserved. This program and the accompanying materials
+# This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD License
 # which accompanies this distribution.  The full text of the license may be found at
 # http://opensource.org/licenses/bsd-license.php
@@ -12,46 +12,46 @@
 #
 #------------------------------------------------------------------------------
 
-       .text
-       .align 2
-       .globl ASM_PFX(__udivsi3)
+  .text
+  .align 2
+  GCC_ASM_EXPORT(__udivsi3)
 
 ASM_PFX(__udivsi3):
-       cmp     r1, #0
-       cmpne   r0, #0
-       stmfd   sp!, {r4, r5, r7, lr}
-       add     r7, sp, #8
-       beq     L2
-       clz     r2, r1
-       clz     r3, r0
-       rsb     r3, r3, r2
-       cmp     r3, #31
-       bhi     L2
-       ldmeqfd sp!, {r4, r5, r7, pc}
-       add     r5, r3, #1
-       rsb     r3, r3, #31
-       mov     lr, #0
-       mov     r2, r0, asl r3
-       mov     ip, r0, lsr r5
-       mov     r4, lr
-       b       L8
+  cmp  r1, #0
+  cmpne  r0, #0
+  stmfd  sp!, {r4, r5, r7, lr}
+  add  r7, sp, #8
+  beq  L2
+  clz  r2, r1
+  clz  r3, r0
+  rsb  r3, r3, r2
+  cmp  r3, #31
+  bhi  L2
+  ldmeqfd  sp!, {r4, r5, r7, pc}
+  add  r5, r3, #1
+  rsb  r3, r3, #31
+  mov  lr, #0
+  mov  r2, r0, asl r3
+  mov  ip, r0, lsr r5
+  mov  r4, lr
+  b  L8
 L9:
-       mov     r0, r2, lsr #31
-       orr     ip, r0, ip, asl #1
-       orr     r2, r3, lr
-       rsb     r3, ip, r1
-       sub     r3, r3, #1
-       and     r0, r1, r3, asr #31
-       mov     lr, r3, lsr #31
-       rsb     ip, r0, ip
-       add     r4, r4, #1
+  mov  r0, r2, lsr #31
+  orr  ip, r0, ip, asl #1
+  orr  r2, r3, lr
+  rsb  r3, ip, r1
+  sub  r3, r3, #1
+  and  r0, r1, r3, asr #31
+  mov  lr, r3, lsr #31
+  rsb  ip, r0, ip
+  add  r4, r4, #1
 L8:
-       cmp     r4, r5
-       mov     r3, r2, asl #1
-       bne     L9
-       orr     r0, r3, lr
-       ldmfd   sp!, {r4, r5, r7, pc}
+  cmp  r4, r5
+  mov  r3, r2, asl #1
+  bne  L9
+  orr  r0, r3, lr
+  ldmfd  sp!, {r4, r5, r7, pc}
 L2:
-       mov     r0, #0
-       ldmfd   sp!, {r4, r5, r7, pc}
+  mov  r0, #0
+  ldmfd  sp!, {r4, r5, r7, pc}