MdeModulePkg/MdeModulePkg.dsc: add MM_STANDALONE FTW and variable modules

[mirror_edk2.git] / ArmPkg / Library / DebugAgentSymbolsBaseLib / Arm / DebugAgentException.S

diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S
index d92acfeacbfd6cb1d07a6829492e18e7720dffb7..21518146080359b1a9b0c966d9373beb8ee270c3 100644 (file)
--- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S
+++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S
@@ -54,6 +54,7 @@ GCC_ASM_EXPORT(DebugAgentVectorTable)
 GCC_ASM_IMPORT(DefaultExceptionHandler)\r
 \r
 .text\r
+.syntax unified\r
 #if !defined(__APPLE__)\r
 .fpu neon    @ makes vpush/vpop assemble\r
 #endif\r
@@ -81,7 +82,7 @@ ASM_PFX(ResetEntry):
   stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
   sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
   stmfd     SP!,{R0-R12}              @ Store the register state\r
-  \r
+\r
   mov       R0,#0                     @ ExceptionType\r
   ldr       R1,ASM_PFX(CommonExceptionEntry)\r
   bx        R1\r
@@ -202,15 +203,15 @@ ASM_PFX(AsmCommonExceptionEntry):
   and       R3, R1, #0x1f           @ Check CPSR to see if User or System Mode\r
   cmp       R3, #0x1f               @ if ((CPSR == 0x10) || (CPSR == 0x1df))\r
   cmpne     R3, #0x10               @\r
-  stmeqed   R2, {lr}^               @   save unbanked lr\r
+  stmdaeq   R2, {lr}^               @   save unbanked lr\r
                                     @ else\r
-  stmneed   R2, {lr}                @   save SVC lr\r
+  stmdane   R2, {lr}                @   save SVC lr\r
 \r
 \r
   ldr       R5, [SP, #0x58]         @ PC is the LR pushed by srsfd\r
                                     @ Check to see if we have to adjust for Thumb entry\r
   sub       r4, r0, #1              @ if (ExceptionType == 1 || ExceptionType ==2)) {\r
-  cmp       r4, #1                  @   // UND & SVC have differnt LR adjust for Thumb\r
+  cmp       r4, #1                  @   // UND & SVC have different LR adjust for Thumb\r
   bhi       NoAdjustNeeded\r
 \r
   tst       r1, #0x20               @   if ((CPSR & T)) == T) {  // Thumb Mode on entry\r
@@ -263,9 +264,9 @@ DefaultExceptionHandler (
   and       R1, R1, #0x1f           @ Check to see if User or System Mode\r
   cmp       R1, #0x1f               @ if ((CPSR == 0x10) || (CPSR == 0x1f))\r
   cmpne     R1, #0x10               @\r
-  ldmeqed   R2, {lr}^               @   restore unbanked lr\r
+  ldmibeq   R2, {lr}^               @   restore unbanked lr\r
                                     @ else\r
-  ldmneed   R3, {lr}                @   restore SVC lr, via ldmfd SP!, {LR}\r
+  ldmibne   R3, {lr}                @   restore SVC lr, via ldmfd SP!, {LR}\r
 \r
   ldmfd     SP!,{R0-R12}            @ Restore general purpose registers\r
                                     @ Exception handler can not change SP\r