ArmPkg: Apply uncrustify changes

[mirror_edk2.git] / ArmPkg / Universal / Smbios / ProcessorSubClassDxe / SmbiosProcessorArm.c

diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
index 7616fca425fd8cd0c515e332d797041fa13f63a8..ddee0e44894aeed939c7981eaf35330a325193d1 100644 (file)
--- a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
+++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
@@ -23,21 +23,21 @@
 **/\r
 UINT64\r
 SmbiosProcessorGetCacheSize (\r
-  IN UINT8   CacheLevel,\r
-  IN BOOLEAN DataCache,\r
-  IN BOOLEAN UnifiedCache\r
+  IN UINT8    CacheLevel,\r
+  IN BOOLEAN  DataCache,\r
+  IN BOOLEAN  UnifiedCache\r
   )\r
 {\r
-  CCSIDR_DATA  Ccsidr;\r
-  CCSIDR2_DATA Ccsidr2;\r
-  CSSELR_DATA  Csselr;\r
-  BOOLEAN      CcidxSupported;\r
-  UINT64       CacheSize;\r
+  CCSIDR_DATA   Ccsidr;\r
+  CCSIDR2_DATA  Ccsidr2;\r
+  CSSELR_DATA   Csselr;\r
+  BOOLEAN       CcidxSupported;\r
+  UINT64        CacheSize;\r
 \r
   // Read the CCSIDR register to get the cache architecture\r
-  Csselr.Data = 0;\r
+  Csselr.Data       = 0;\r
   Csselr.Bits.Level = CacheLevel - 1;\r
-  Csselr.Bits.InD = (!DataCache && !UnifiedCache);\r
+  Csselr.Bits.InD   = (!DataCache && !UnifiedCache);\r
 \r
   Ccsidr.Data = ReadCCSIDR (Csselr.Data);\r
 \r
@@ -45,13 +45,13 @@ SmbiosProcessorGetCacheSize (
 \r
   if (CcidxSupported) {\r
     Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);\r
-    CacheSize = (1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *\r
-                      (Ccsidr.BitsCcidxAA32.Associativity + 1) *\r
-                      (Ccsidr2.Bits.NumSets + 1);\r
+    CacheSize    = (1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *\r
+                   (Ccsidr.BitsCcidxAA32.Associativity + 1) *\r
+                   (Ccsidr2.Bits.NumSets + 1);\r
   } else {\r
     CacheSize = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *\r
-                      (Ccsidr.BitsNonCcidx.Associativity + 1) *\r
-                      (Ccsidr.BitsNonCcidx.NumSets + 1);\r
+                (Ccsidr.BitsNonCcidx.Associativity + 1) *\r
+                (Ccsidr.BitsNonCcidx.NumSets + 1);\r
   }\r
 \r
   return CacheSize;\r
@@ -67,9 +67,9 @@ SmbiosProcessorGetCacheSize (
 **/\r
 UINT32\r
 SmbiosProcessorGetCacheAssociativity (\r
-  IN UINT8   CacheLevel,\r
-  IN BOOLEAN DataCache,\r
-  IN BOOLEAN UnifiedCache\r
+  IN UINT8    CacheLevel,\r
+  IN BOOLEAN  DataCache,\r
+  IN BOOLEAN  UnifiedCache\r
   )\r
 {\r
   CCSIDR_DATA  Ccsidr;\r
@@ -78,9 +78,9 @@ SmbiosProcessorGetCacheAssociativity (
   UINT32       Associativity;\r
 \r
   // Read the CCSIDR register to get the cache architecture\r
-  Csselr.Data = 0;\r
+  Csselr.Data       = 0;\r
   Csselr.Bits.Level = CacheLevel - 1;\r
-  Csselr.Bits.InD = (!DataCache && !UnifiedCache);\r
+  Csselr.Bits.InD   = (!DataCache && !UnifiedCache);\r
 \r
   Ccsidr.Data = ReadCCSIDR (Csselr.Data);\r
 \r
@@ -94,4 +94,3 @@ SmbiosProcessorGetCacheAssociativity (
 \r
   return Associativity;\r
 }\r
-\r