#/** @file\r
#\r
-# Copyright (c) 2011-2018, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011-2021, ARM Limited. All rights reserved.\r
# Copyright (c) 2015, Intel Corporation. All rights reserved.\r
#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
#**/\r
\r
Include # Root include for the package\r
\r
[LibraryClasses]\r
+ ## @libraryclass Provides an interface to query platform information.\r
+ #\r
ArmPlatformLib|Include/Library/ArmPlatformLib.h\r
+\r
+ ## @libraryclass Provides an interface to initialize/shutdown a LCD screen.\r
+ #\r
LcdHwLib|Include/Library/LcdHwLib.h\r
+\r
+ ## @libraryclass Provides an interface to configure a LCD screen.\r
+ #\r
LcdPlatformLib|Include/Library/LcdPlatformLib.h\r
- NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h\r
+\r
+ ## @libraryclass Provides an interface to the clock of a PL011 device.\r
+ #\r
PL011UartClockLib|Include/Library/PL011UartClockLib.h\r
+\r
+ ## @libraryclass Provides an interface to a PL011 uart.\r
+ #\r
PL011UartLib|Include/Library/PL011UartLib.h\r
\r
[Guids.common]\r
[PcdsFeatureFlag.common]\r
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004\r
\r
- gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C\r
-\r
# Disable the GOP controller on ExitBootServices(). By default the value is FALSE,\r
# we assume the OS will handle the FrameBuffer from the UEFI GOP information.\r
gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D\r
gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030\r
gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|0x00000000|UINT64|0x00000031\r
gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|0x00000000|UINT32|0x00000032\r
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt|0x00000000|UINT32|0x00000041\r
\r
## PL061 GPIO\r
gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025\r
gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x00000050\r
gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x00000051\r
\r
- ## PL180 MCI\r
- gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028\r
- gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029\r
-\r
# Graphics Output Pixel format\r
# 0 : PixelRedGreenBlueReserved8BitPerColor\r
# 1 : PixelBlueGreenRedReserved8BitPerColor\r