#define SP804_TIMER2_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12000)\r
#define SP804_TIMER3_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x12020)\r
\r
+// PL301 RTC\r
+#define PL031_RTC_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x17000)\r
+\r
// Dynamic Memory Controller Base\r
#define ARM_EB_DMC_BASE 0x10018000\r
\r
//#define ARM_EB_L2x0_CTLR_BASE 0x1E00A000*/\r
\r
\r
+// PL031 RTC - Other settings\r
+#define PL031_PPM_ACCURACY 300000000\r
+\r
+\r
/*******************************************\r
// EFI Memory Map in Permanent Memory (DRAM)\r
*******************************************/\r