/** @file
*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
**/
#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
+
#include <Drivers/PL341Dmc.h>
+#include <Drivers/SP804Timer.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+#include <ArmPlatform.h>
+
+ARM_CORE_INFO mRealViewEbMpCoreInfoTable[] = {
+ {
+ // Cluster 0, Core 0
+ 0x0, 0x0,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 1
+ 0x0, 0x1,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ }
+};
/**
- Return if Trustzone is supported by your platform
-
- A non-zero value must be returned if you want to support a Secure World on your platform.
- ArmPlatformTrustzoneInit() will later set up the secure regions.
- This function can return 0 even if Trustzone is supported by your processor. In this case,
- the platform will continue to run in Secure World.
+ Return the current Boot Mode
- @return A non-zero value if Trustzone supported.
+ This function returns the boot reason on the platform
**/
-UINTN ArmPlatformTrustzoneSupported(VOID) {
- // There is no Trustzone controllers (TZPC & TZASC) and no Secure Memory on RTSM
- return FALSE;
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
}
/**
- Initialize the Secure peripherals and memory regions
+ Initialize controllers that must setup in the normal world
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
+ This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+ in the PEI phase.
**/
-VOID ArmPlatformTrustzoneInit(VOID) {
- ASSERT(FALSE);
-}
-
-/**
- Remap the memory at 0x0
-
- Some platform requires or gives the ability to remap the memory at the address 0x0.
- This function can do nothing if this feature is not relevant to your platform.
+RETURN_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
+ )
+{
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
-**/
-VOID ArmPlatformBootRemapping(VOID) {
// Disable memory remapping and return to normal mapping
- MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
+ MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
+
+ // Configure periodic timer (TIMER0) for 1MHz operation
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+ // Configure 1MHz clock
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+ // configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+ return RETURN_SUCCESS;
}
/**
- Initialize controllers that must setup at the early stage
+ Initialize the system (or sometimes called permanent) memory
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
+ This memory is generally represented by the DRAM.
**/
VOID
-ArmPlatformInitialize (
+ArmPlatformInitializeSystemMemory (
VOID
- ) {
- // Do nothing yet
+ )
+{
+ // We do not need to initialize the System Memory on RTSM
}
-/**
- Initialize the system (or sometimes called permanent) memory
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+ OUT UINTN *CoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+ )
+{
+ if ((MmioRead32 (ARM_EB_SYS_PROCID0_REG) & ARM_EB_SYS_PROC_ID_MASK) == ARM_EB_SYS_PROC_ID_CORTEX_A9) {
+ *CoreCount = sizeof(mRealViewEbMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
+ *ArmCoreTable = mRealViewEbMpCoreInfoTable;
+ return EFI_SUCCESS;
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+}
- This memory is generally represented by the DRAM.
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-**/
-VOID ArmPlatformInitializeSystemMemory(VOID) {
- // We do not need to initialize the System Memory on RTSM
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &mArmMpCoreInfoPpiGuid,
+ &mMpCoreInfoPpi
+ }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+ OUT UINTN *PpiListSize,
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ )
+{
+ *PpiListSize = sizeof(gPlatformPpiTable);
+ *PpiList = gPlatformPpiTable;
}
+
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