/** @file
*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
**/
#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
}
};
-/**
- Return if Trustzone is supported by your platform
-
- A non-zero value must be returned if you want to support a Secure World on your platform.
- ArmPlatformTrustzoneInit() will later set up the secure regions.
- This function can return 0 even if Trustzone is supported by your processor. In this case,
- the platform will continue to run in Secure World.
-
- @return A non-zero value if Trustzone supported.
-
-**/
-UINTN
-ArmPlatformTrustzoneSupported (
- VOID
- )
-{
- // There is no Trustzone controllers (TZPC & TZASC) and no Secure Memory on RTSM
- return FALSE;
-}
-
-/**
- Remap the memory at 0x0
-
- Some platform requires or gives the ability to remap the memory at the address 0x0.
- This function can do nothing if this feature is not relevant to your platform.
-
-**/
-VOID
-ArmPlatformBootRemapping (
- VOID
- )
-{
- // Disable memory remapping and return to normal mapping
- MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
-}
-
/**
Return the current Boot Mode
in the PEI phase.
**/
-VOID
-ArmPlatformNormalInitialize (
- VOID
+RETURN_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
)
{
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // Disable memory remapping and return to normal mapping
+ MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
+
// Configure periodic timer (TIMER0) for 1MHz operation
MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
// Configure 1MHz clock
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
// Configure SP810 to use 1MHz clock and disable
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+ return RETURN_SUCCESS;
}
/**