+//UINTN\r
+//ArmPlatformIsPrimaryCore (\r
+// IN UINTN MpId\r
+// );\r
+ArmPlatformIsPrimaryCore FUNCTION\r
+ // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r
+ // with cpu_id[0:3] and cluster_id[4:7]\r
+ LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)\r
+ ldr r1, [r1]\r
+ lsr r1, #24\r
+\r
+ // Shift the SCC value to get the cluster ID at the offset #8\r
+ lsl r2, r1, #4\r
+ and r2, r2, #0xF00\r
+\r
+ // Keep only the cpu ID from the original SCC\r
+ and r1, r1, #0x0F\r
+ // Add the Cluster ID to the Cpu ID\r
+ orr r1, r1, r2\r
+\r
+ // Keep the Cluster ID and Core ID from the MPID\r
+ LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)\r
+ and r0, r0, r2\r
+\r
+ // Compare mpid and boot cpu from ARM_SCC_CFGREG48\r
+ cmp r0, r1\r
+ moveq r0, #1\r
+ movne r0, #0\r
+ bx lr\r
+ ENDFUNC\r
+\r