ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressLibRTSM / Arm / RTSMHelper.asm

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
index 7326237bc731ee519fdf72f165b69072ac9c2299..7d00d115dc34bb3adf5eda89dd27aa12ae20d5c4 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
@@ -1,5 +1,5 @@
 //\r
-//  Copyright (c) 2011, ARM Limited. All rights reserved.\r
+//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
 //  \r
 //  This program and the accompanying materials                          \r
 //  are licensed and made available under the terms and conditions of the BSD License         \r
@@ -22,21 +22,26 @@
   INCLUDE AsmMacroIoLib.inc\r
 \r
   EXPORT    ArmGetCpuCountPerCluster\r
-    \r
+  EXPORT    ArmPlatformIsPrimaryCore\r
+\r
+  IMPORT  _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
+  IMPORT  _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask\r
+\r
   AREA RTSMHelper, CODE, READONLY\r
 \r
 // IN None\r
 // OUT r0 = SCU Base Address\r
-ArmGetScuBaseAddress\r
+ArmGetScuBaseAddress FUNCTION\r
   // Read Configuration Base Address Register. ArmCBar cannot be called to get\r
   // the Configuration BAR as a stack is not necessary setup. The SCU is at the\r
   // offset 0x0000 from the Private Memory Region.\r
   mrc   p15, 4, r0, c15, c0, 0\r
   bx  lr\r
+  ENDFUNC\r
 \r
 // IN None\r
 // OUT r0 = number of cores present in the system\r
-ArmGetCpuCountPerCluster\r
+ArmGetCpuCountPerCluster FUNCTION\r
   stmfd SP!, {r1-r2}\r
 \r
   // Read CP15 MIDR\r
@@ -69,5 +74,22 @@ _Return
   add   r0, r0, #1\r
   ldmfd SP!, {r1-r2}\r
   bx lr\r
+  ENDFUNC\r
+\r
+//UINTN\r
+//ArmPlatformIsPrimaryCore (\r
+//  IN UINTN MpId\r
+//  );\r
+ArmPlatformIsPrimaryCore FUNCTION\r
+  LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)\r
+  ldr   r1, [r1]\r
+  and   r0, r0, r1\r
+  LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)\r
+  ldr   r1, [r1]\r
+  cmp   r0, r1\r
+  moveq r0, #1\r
+  movne r0, #0\r
+  bx   lr\r
+  ENDFUNC\r
 \r
   END\r