ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressSecLibRTSM / RTSMSec.c

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
index bce834eea93f501d211387fb6986f1c033c1f8df..9023715ab065c70479ba56479128897d3fb40bd4 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
@@ -1,18 +1,19 @@
 /** @file\r
 *\r
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
-*  \r
-*  This program and the accompanying materials                          \r
-*  are licensed and made available under the terms and conditions of the BSD License         \r
-*  which accompanies this distribution.  The full text of the license may be found at        \r
-*  http://opensource.org/licenses/bsd-license.php                                            \r
+*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 *\r
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+*  This program and the accompanying materials\r
+*  are licensed and made available under the terms and conditions of the BSD License\r
+*  which accompanies this distribution.  The full text of the license may be found at\r
+*  http://opensource.org/licenses/bsd-license.php\r
+*\r
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 *\r
 **/\r
 \r
 #include <Library/IoLib.h>\r
+#include <Library/ArmGicLib.h>\r
 #include <Library/ArmPlatformLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
@@ -22,6 +23,12 @@
 \r
 #include <ArmPlatform.h>\r
 \r
+// Initialize GICv3 to expose it as a GICv2 as UEFI does not support GICv3 yet\r
+VOID\r
+InitializeGicV3 (\r
+  VOID\r
+  );\r
+\r
 /**\r
   Initialize the Secure peripherals and memory regions\r
 \r
@@ -49,6 +56,8 @@ ArmPlatformSecInitialize (
   IN  UINTN                     MpId\r
   )\r
 {\r
+  UINT32  Identification;\r
+\r
   // If it is not the primary core then there is nothing to do\r
   if (!ArmPlatformIsPrimaryCore (MpId)) {\r
     return RETURN_SUCCESS;\r
@@ -63,6 +72,14 @@ ArmPlatformSecInitialize (
   // Configure SP810 to use 1MHz clock and disable\r
   MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);\r
 \r
+  // Read the GIC Identification Register\r
+  Identification = ArmGicGetInterfaceIdentification (PcdGet32 (PcdGicInterruptInterfaceBase));\r
+\r
+  // Check if we are GICv3\r
+  if (ARM_GIC_ICCIIDR_GET_ARCH_VERSION(Identification) >= 0x3) {\r
+    InitializeGicV3 ();\r
+  }\r
+\r
   return RETURN_SUCCESS;\r
 }\r
 \r
@@ -79,5 +96,5 @@ ArmPlatformSecExtraAction (
   OUT UINTN*        JumpAddress\r
   )\r
 {\r
-  *JumpAddress = PcdGet32(PcdFvBaseAddress);\r
+  *JumpAddress = PcdGet64 (PcdFvBaseAddress);\r
 }\r