EmbeddedPkg: Clarify the declaration of SerialPortSetControl()

[mirror_edk2.git] / ArmPlatformPkg / Drivers / PL011Uart / PL011Uart.c

diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
index fd686799b269f56046754fdb30aa4c98ffd8417d..a40e269d07e3106a13278fcf8b231f9c4a986156 100644 (file)
--- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
+++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
@@ -2,7 +2,7 @@
   Serial I/O Port library functions with no library constructor/destructor\r
 \r
   Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
-  Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+  Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
@@ -20,6 +20,12 @@
 \r
 #include <Drivers/PL011Uart.h>\r
 \r
+//\r
+// EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE is the only\r
+// control bit that is not supported.\r
+//\r
+STATIC CONST UINT32 mInvalidControlBits = EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;\r
+\r
 /*\r
 \r
   Initialise the serial port to the specified settings.\r
@@ -159,53 +165,69 @@ PL011UartInitializePort (
 }\r
 \r
 /**\r
-  Set the serial device control bits.\r
 \r
-  @param  UartBase                The base address of the PL011 UART.\r
-  @param  Control                 Control bits which are to be set on the serial device.\r
-\r
-  @retval EFI_SUCCESS             The new control bits were set on the serial device.\r
-  @retval EFI_UNSUPPORTED         The serial device does not support this operation.\r
-  @retval EFI_DEVICE_ERROR        The serial device is not functioning correctly.\r
+  Assert or deassert the control signals on a serial port.\r
+  The following control signals are set according their bit settings :\r
+  . Request to Send\r
+  . Data Terminal Ready\r
+\r
+  @param[in]  UartBase  UART registers base address\r
+  @param[in]  Control   The following bits are taken into account :\r
+                        . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
+                          "Request To Send" control signal if this bit is\r
+                          equal to one/zero.\r
+                        . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
+                          the "Data Terminal Ready" control signal if this\r
+                          bit is equal to one/zero.\r
+                        . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
+                          the hardware loopback if this bit is equal to\r
+                          one/zero.\r
+                        . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
+                        . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
+                          disable the hardware flow control based on CTS (Clear\r
+                          To Send) and RTS (Ready To Send) control signals.\r
+\r
+  @retval  RETURN_SUCCESS      The new control bits were set on the serial device.\r
+  @retval  RETURN_UNSUPPORTED  The serial device does not support this operation.\r
 \r
 **/\r
 RETURN_STATUS\r
 EFIAPI\r
 PL011UartSetControl (\r
-    IN UINTN                    UartBase,\r
-    IN UINT32                   Control\r
+    IN UINTN   UartBase,\r
+    IN UINT32  Control\r
   )\r
 {\r
-  UINT32      Bits;\r
-  UINT32      ValidControlBits;\r
-\r
-  ValidControlBits = (  EFI_SERIAL_REQUEST_TO_SEND\r
-                      | EFI_SERIAL_DATA_TERMINAL_READY\r
-  //                  | EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE       // Not implemented yet.\r
-  //                  | EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE       // Not implemented yet.\r
-                      | EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE\r
-                     );\r
-\r
-  if (Control & (~ValidControlBits)) {\r
-    return EFI_UNSUPPORTED;\r
+  UINT32  Bits;\r
+\r
+  if (Control & (mInvalidControlBits)) {\r
+    return RETURN_UNSUPPORTED;\r
   }\r
 \r
   Bits = MmioRead32 (UartBase + UARTCR);\r
 \r
   if (Control & EFI_SERIAL_REQUEST_TO_SEND) {\r
     Bits |= PL011_UARTCR_RTS;\r
+  } else {\r
+    Bits &= ~PL011_UARTCR_RTS;\r
   }\r
 \r
   if (Control & EFI_SERIAL_DATA_TERMINAL_READY) {\r
     Bits |= PL011_UARTCR_DTR;\r
+  } else {\r
+    Bits &= ~PL011_UARTCR_DTR;\r
   }\r
 \r
   if (Control & EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE) {\r
     Bits |= PL011_UARTCR_LBE;\r
+  } else {\r
+    Bits &= ~PL011_UARTCR_LBE;\r
   }\r
 \r
   if (Control & EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE) {\r
-    Bits |= (PL011_UARTCR_CTSEN & PL011_UARTCR_RTSEN);\r
+    Bits |= (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN);\r
+  } else {\r
+    Bits &= ~(PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN);\r
   }\r
 \r
   MmioWrite32 (UartBase + UARTCR, Bits);\r