#define MCI_SELECT_REG (MCI_SYSCTL + 0x044)\r
#define MCI_FIFOCOUNT_REG (MCI_SYSCTL + 0x048)\r
#define MCI_FIFO_REG (MCI_SYSCTL + 0x080)\r
+#define MCI_PERIPH_ID_REG0 (MCI_SYSCTL + 0xFE0)\r
+#define MCI_PERIPH_ID_REG1 (MCI_SYSCTL + 0xFE4)\r
+#define MCI_PERIPH_ID_REG2 (MCI_SYSCTL + 0xFE8)\r
+#define MCI_PERIPH_ID_REG3 (MCI_SYSCTL + 0xFEC)\r
+#define MCI_PCELL_ID_REG0 (MCI_SYSCTL + 0xFF0)\r
+#define MCI_PCELL_ID_REG1 (MCI_SYSCTL + 0xFF4)\r
+#define MCI_PCELL_ID_REG2 (MCI_SYSCTL + 0xFF8)\r
+#define MCI_PCELL_ID_REG3 (MCI_SYSCTL + 0xFFC)\r
+\r
+#define MCI_PERIPH_ID0 0x80\r
+#define MCI_PERIPH_ID1 0x11\r
+#define MCI_PERIPH_ID2 0x04\r
+#define MCI_PERIPH_ID3 0x00\r
+#define MCI_PCELL_ID0 0x0D\r
+#define MCI_PCELL_ID1 0xF0\r
+#define MCI_PCELL_ID2 0x05\r
+#define MCI_PCELL_ID3 0xB1\r
\r
#define MCI_POWER_OFF 0\r
#define MCI_POWER_UP BIT1\r