/** @file\r
*\r
-* Copyright (c) 2011, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
#ifndef PL35xSMC_H_\r
#define PL35xSMC_H_\r
\r
-#define PL350_SMC_DIRECT_CMD_OFFSET 0x10\r
-#define PL350_SMC_SET_CYCLES_OFFSET 0x14\r
-#define PL350_SMC_SET_OPMODE_OFFSET 0x18\r
+#define PL350_SMC_DIRECT_CMD_OFFSET 0x10\r
+#define PL350_SMC_SET_CYCLES_OFFSET 0x14\r
+#define PL350_SMC_SET_OPMODE_OFFSET 0x18\r
+#define PL350_SMC_REFRESH_0_OFFSET 0x20\r
+#define PL350_SMC_REFRESH_1_OFFSET 0x24\r
\r
#define PL350_SMC_DIRECT_CMD_ADDR(addr) ((addr) & 0xFFFFF)\r
#define PL350_SMC_DIRECT_CMD_ADDR_SET_CRE (1 << 20)\r