/** @file\r
*\r
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
VOID\r
)\r
{\r
- VOID (*secondary_start)(VOID);\r
- UINTN Interrupt;\r
+ VOID (*SecondaryStart)(VOID);\r
+ UINTN AcknowledgeInterrupt;\r
+ UINTN InterruptId;\r
\r
// The secondary cores will execute the firmware once wake from WFI.\r
- secondary_start = (VOID (*)())PcdGet32(PcdFvBaseAddress);\r
+ SecondaryStart = (VOID (*)())PcdGet32 (PcdFvBaseAddress);\r
\r
- ArmCallWFI();\r
+ ArmCallWFI ();\r
\r
// Acknowledge the interrupt and send End of Interrupt signal.\r
- Interrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase));\r
+ AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);\r
// Check if it is a valid interrupt ID\r
- if ((Interrupt & ARM_GIC_ICCIAR_ACKINTID) < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {\r
+ if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {\r
// Got a valid SGI number hence signal End of Interrupt\r
- ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), Interrupt);\r
+ ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);\r
}\r
\r
// Jump to secondary core entry point.\r
- secondary_start ();\r
+ SecondaryStart ();\r
\r
// PEI Core should always load and never return\r
ASSERT (FALSE);\r