//\r
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+// SPDX-License-Identifier: BSD-2-Clause-Patent\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
#include <AutoGen.h>\r
\r
INCLUDE AsmMacroIoLib.inc\r
bl ArmPlatformIsPrimaryCore\r
\r
// Get the top of the primary stacks (and the base of the secondary stacks)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- add r1, r1, r2\r
+ mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
\r
// r0 is equal to 1 if I am the primary core\r
cmp r0, #1\r
add r0, r0, #1\r
\r
// StackOffset = CorePos * StackSize\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
+ mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
mul r0, r0, r2\r
// SP = StackBase + StackOffset\r
add sp, r6, r0\r
\r
_PrepareArguments\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
- LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
- add r2, r2, #4\r
- ldr r1, [r2]\r
+ mov32 r2, FixedPcdGet32(PcdFvBaseAddress)\r
+ ldr r1, [r2, #4]\r
\r
// Move sec startup address into a data register\r
// Ensure we're jumping to FV version of the code (not boot remapped alias)\r
\r
_SetupPrimaryCoreStack\r
mov sp, r1\r
+ mov32 r8, FixedPcdGet64 (PcdCPUCoresStackBase)\r
+ mov32 r9, FixedPcdGet32 (PcdInitValueInTempStack)\r
+ mov r10, r9\r
+ mov r11, r9\r
+ mov r12, r9\r
+0:stm r8!, {r9-r12}\r
+ cmp r8, r1\r
+ blt 0b\r
b _PrepareArguments\r
\r
_NeverReturn\r