ArmPlatformPkg: Apply uncrustify changes

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / MainMPCore.c

diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
index 859f1adf2078dd2e7b2809cbe56ec209f638bc3e..0b8e5dfb3f309c5c72a966e38f7b0a34f66275b3 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
@@ -24,7 +24,7 @@
 VOID\r
 EFIAPI\r
 SecondaryMain (\r
-  IN UINTN MpId\r
+  IN UINTN  MpId\r
   )\r
 {\r
   EFI_STATUS              Status;\r
@@ -37,18 +37,21 @@ SecondaryMain (
   ARM_CORE_INFO           *ArmCoreInfoTable;\r
   UINT32                  ClusterId;\r
   UINT32                  CoreId;\r
-  VOID                    (*SecondaryStart)(VOID);\r
-  UINTN                   SecondaryEntryAddr;\r
-  UINTN                   AcknowledgeInterrupt;\r
-  UINTN                   InterruptId;\r
 \r
-  ClusterId = GET_CLUSTER_ID(MpId);\r
-  CoreId    = GET_CORE_ID(MpId);\r
+  VOID  (*SecondaryStart)(\r
+    VOID\r
+    );\r
+  UINTN  SecondaryEntryAddr;\r
+  UINTN  AcknowledgeInterrupt;\r
+  UINTN  InterruptId;\r
+\r
+  ClusterId = GET_CLUSTER_ID (MpId);\r
+  CoreId    = GET_CORE_ID (MpId);\r
 \r
   // Get the gArmMpCoreInfoPpiGuid\r
   PpiListSize = 0;\r
   ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
-  PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
+  PpiListCount = PpiListSize / sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
   for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
     if (CompareGuid (PpiList->Guid, &gArmMpCoreInfoPpiGuid) == TRUE) {\r
       break;\r
@@ -59,8 +62,8 @@ SecondaryMain (
   ASSERT (Index != PpiListCount);\r
 \r
   ArmMpCoreInfoPpi = PpiList->Ppi;\r
-  ArmCoreCount = 0;\r
-  Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
+  ArmCoreCount     = 0;\r
+  Status           = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
   ASSERT_EFI_ERROR (Status);\r
 \r
   // Find the core in the ArmCoreTable\r
@@ -92,11 +95,11 @@ SecondaryMain (
   } while (SecondaryEntryAddr == 0);\r
 \r
   // Jump to secondary core entry point.\r
-  SecondaryStart = (VOID (*)())SecondaryEntryAddr;\r
-  SecondaryStart();\r
+  SecondaryStart = (VOID (*)()) SecondaryEntryAddr;\r
+  SecondaryStart ();\r
 \r
   // The secondaries shouldn't reach here\r
-  ASSERT(FALSE);\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID\r
@@ -105,26 +108,26 @@ PrimaryMain (
   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint\r
   )\r
 {\r
-  EFI_SEC_PEI_HAND_OFF        SecCoreData;\r
-  UINTN                       PpiListSize;\r
-  EFI_PEI_PPI_DESCRIPTOR      *PpiList;\r
-  UINTN                       TemporaryRamBase;\r
-  UINTN                       TemporaryRamSize;\r
+  EFI_SEC_PEI_HAND_OFF    SecCoreData;\r
+  UINTN                   PpiListSize;\r
+  EFI_PEI_PPI_DESCRIPTOR  *PpiList;\r
+  UINTN                   TemporaryRamBase;\r
+  UINTN                   TemporaryRamSize;\r
 \r
   CreatePpiList (&PpiListSize, &PpiList);\r
 \r
   // Enable the GIC Distributor\r
-  ArmGicEnableDistributor (PcdGet64(PcdGicDistributorBase));\r
+  ArmGicEnableDistributor (PcdGet64 (PcdGicDistributorBase));\r
 \r
   // If ArmVe has not been built as Standalone then we need to wake up the secondary cores\r
   if (FeaturePcdGet (PcdSendSgiToBringUpSecondaryCores)) {\r
     // Sending SGI to all the Secondary CPU interfaces\r
-    ArmGicSendSgiTo (PcdGet64(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
+    ArmGicSendSgiTo (PcdGet64 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
   }\r
 \r
   // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at\r
   // the base of the primary core stack\r
-  PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT);\r
+  PpiListSize      = ALIGN_VALUE (PpiListSize, CPU_STACK_ALIGNMENT);\r
   TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;\r
   TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;\r
 \r
@@ -133,7 +136,7 @@ PrimaryMain (
   // Note: this must be in sync with the stuff in the asm file\r
   // Note also:  HOBs (pei temp ram) MUST be above stack\r
   //\r
-  SecCoreData.DataSize               = sizeof(EFI_SEC_PEI_HAND_OFF);\r
+  SecCoreData.DataSize               = sizeof (EFI_SEC_PEI_HAND_OFF);\r
   SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);\r
   SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);\r
   SecCoreData.TemporaryRamBase       = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)\r