ArmPlatformPkg: Code cleaning

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / MainUniCore.c

diff --git a/ArmPlatformPkg/PrePeiCore/MainUniCore.c b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
index 15e7629c864a3da78145af0de9a76529f4015988..c09494557b986e49d04c67b4b730242d161d043c 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/MainUniCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
@@ -12,42 +12,47 @@
 *\r
 **/\r
 \r
-#include <PiPei.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
 #include <Chipset/ArmV7.h>\r
 \r
+#include "PrePeiCore.h"\r
+\r
 extern EFI_PEI_PPI_DESCRIPTOR *gSecPpiTable;\r
 \r
 VOID\r
 EFIAPI\r
-secondary_main(IN UINTN CoreId)\r
+SecondaryMain (\r
+  IN UINTN CoreId\r
+  )\r
 {\r
-       ASSERT(FALSE);\r
+  ASSERT(FALSE);\r
 }\r
 \r
-VOID primary_main (\r
+VOID\r
+EFIAPI\r
+PrimaryMain (\r
   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint\r
   )\r
 {\r
-       EFI_SEC_PEI_HAND_OFF        SecCoreData;\r
-\r
-\r
-       //\r
-       // Bind this information into the SEC hand-off state\r
-       // Note: this must be in sync with the stuff in the asm file\r
-       // Note also:  HOBs (pei temp ram) MUST be above stack\r
-       //\r
-       SecCoreData.DataSize               = sizeof(EFI_SEC_PEI_HAND_OFF);\r
-    SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);\r
-    SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);\r
-       SecCoreData.TemporaryRamBase       = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)\r
-       SecCoreData.TemporaryRamSize       = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);\r
-       SecCoreData.PeiTemporaryRamBase    = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));\r
-       SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;\r
-       SecCoreData.StackBase              = SecCoreData.TemporaryRamBase;\r
-       SecCoreData.StackSize              = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;\r
-\r
-       // jump to pei core entry point\r
-       (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);\r
+  EFI_SEC_PEI_HAND_OFF        SecCoreData;\r
+\r
+\r
+  //\r
+  // Bind this information into the SEC hand-off state\r
+  // Note: this must be in sync with the stuff in the asm file\r
+  // Note also:  HOBs (pei temp ram) MUST be above stack\r
+  //\r
+  SecCoreData.DataSize               = sizeof(EFI_SEC_PEI_HAND_OFF);\r
+  SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);\r
+  SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);\r
+  SecCoreData.TemporaryRamBase       = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)\r
+  SecCoreData.TemporaryRamSize       = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);\r
+  SecCoreData.PeiTemporaryRamBase    = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));\r
+  SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;\r
+  SecCoreData.StackBase              = SecCoreData.TemporaryRamBase;\r
+  SecCoreData.StackSize              = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;\r
+\r
+  // jump to pei core entry point\r
+  (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);\r
 }\r