ArmPlatformPkg: Apply uncrustify changes

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCore.c

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index 69dbb77dee540c2240e023da063837caa62d2629..6dd9bcdea24fdc966108e0525e5a239ffcd7bb9b 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -14,13 +14,13 @@
 \r
 #include "PrePeiCore.h"\r
 \r
-CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport };\r
+CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI  mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport };\r
 \r
-CONST EFI_PEI_PPI_DESCRIPTOR      gCommonPpiTable[] = {\r
+CONST EFI_PEI_PPI_DESCRIPTOR  gCommonPpiTable[] = {\r
   {\r
     EFI_PEI_PPI_DESCRIPTOR_PPI,\r
     &gEfiTemporaryRamSupportPpiGuid,\r
-    (VOID *) &mTemporaryRamSupportPpi\r
+    (VOID *)&mTemporaryRamSupportPpi\r
   }\r
 };\r
 \r
@@ -30,10 +30,10 @@ CreatePpiList (
   OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList\r
   )\r
 {\r
-  EFI_PEI_PPI_DESCRIPTOR *PlatformPpiList;\r
+  EFI_PEI_PPI_DESCRIPTOR  *PlatformPpiList;\r
   UINTN                   PlatformPpiListSize;\r
   UINTN                   ListBase;\r
-  EFI_PEI_PPI_DESCRIPTOR *LastPpi;\r
+  EFI_PEI_PPI_DESCRIPTOR  *LastPpi;\r
 \r
   // Get the Platform PPIs\r
   PlatformPpiListSize = 0;\r
@@ -41,15 +41,15 @@ CreatePpiList (
 \r
   // Copy the Common and Platform PPis in Temporary Memory\r
   ListBase = PcdGet64 (PcdCPUCoresStackBase);\r
-  CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));\r
-  CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);\r
+  CopyMem ((VOID *)ListBase, gCommonPpiTable, sizeof (gCommonPpiTable));\r
+  CopyMem ((VOID *)(ListBase + sizeof (gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);\r
 \r
   // Set the Terminate flag on the last PPI entry\r
-  LastPpi = (EFI_PEI_PPI_DESCRIPTOR*)ListBase + ((sizeof(gCommonPpiTable) + PlatformPpiListSize) / sizeof(EFI_PEI_PPI_DESCRIPTOR)) - 1;\r
+  LastPpi         = (EFI_PEI_PPI_DESCRIPTOR *)ListBase + ((sizeof (gCommonPpiTable) + PlatformPpiListSize) / sizeof (EFI_PEI_PPI_DESCRIPTOR)) - 1;\r
   LastPpi->Flags |= EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;\r
 \r
-  *PpiList     = (EFI_PEI_PPI_DESCRIPTOR*)ListBase;\r
-  *PpiListSize = sizeof(gCommonPpiTable) + PlatformPpiListSize;\r
+  *PpiList     = (EFI_PEI_PPI_DESCRIPTOR *)ListBase;\r
+  *PpiListSize = sizeof (gCommonPpiTable) + PlatformPpiListSize;\r
 }\r
 \r
 VOID\r
@@ -65,8 +65,10 @@ CEntryPoint (
   // Enable Instruction Caches on all cores.\r
   ArmEnableInstructionCache ();\r
 \r
-  InvalidateDataCacheRange ((VOID *)(UINTN)PcdGet64 (PcdCPUCoresStackBase),\r
-                            PcdGet32 (PcdCPUCorePrimaryStackSize));\r
+  InvalidateDataCacheRange (\r
+    (VOID *)(UINTN)PcdGet64 (PcdCPUCoresStackBase),\r
+    PcdGet32 (PcdCPUCorePrimaryStackSize)\r
+    );\r
 \r
   //\r
   // Note: Doesn't have to Enable CPU interface in non-secure world,\r
@@ -84,7 +86,7 @@ CEntryPoint (
     ArmEnableVFP ();\r
   }\r
 \r
-  //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r
+  // Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r
 \r
   // If not primary Jump to Secondary Main\r
   if (ArmPlatformIsPrimaryCore (MpId)) {\r
@@ -108,25 +110,25 @@ CEntryPoint (
 EFI_STATUS\r
 EFIAPI\r
 PrePeiCoreTemporaryRamSupport (\r
-  IN CONST EFI_PEI_SERVICES   **PeiServices,\r
-  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,\r
-  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,\r
-  IN UINTN                    CopySize\r
+  IN CONST EFI_PEI_SERVICES  **PeiServices,\r
+  IN EFI_PHYSICAL_ADDRESS    TemporaryMemoryBase,\r
+  IN EFI_PHYSICAL_ADDRESS    PermanentMemoryBase,\r
+  IN UINTN                   CopySize\r
   )\r
 {\r
-  VOID                             *OldHeap;\r
-  VOID                             *NewHeap;\r
-  VOID                             *OldStack;\r
-  VOID                             *NewStack;\r
-  UINTN                            HeapSize;\r
+  VOID   *OldHeap;\r
+  VOID   *NewHeap;\r
+  VOID   *OldStack;\r
+  VOID   *NewStack;\r
+  UINTN  HeapSize;\r
 \r
   HeapSize = ALIGN_VALUE (CopySize / 2, CPU_STACK_ALIGNMENT);\r
 \r
-  OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;\r
-  NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize - HeapSize));\r
+  OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;\r
+  NewHeap = (VOID *)((UINTN)PermanentMemoryBase + (CopySize - HeapSize));\r
 \r
-  OldStack = (VOID*)((UINTN)TemporaryMemoryBase + HeapSize);\r
-  NewStack = (VOID*)(UINTN)PermanentMemoryBase;\r
+  OldStack = (VOID *)((UINTN)TemporaryMemoryBase + HeapSize);\r
+  NewStack = (VOID *)(UINTN)PermanentMemoryBase;\r
 \r
   //\r
   // Migrate the temporary memory stack to permanent memory stack.\r