ArmPlatformPkg: Introduce ArmPlatformGlobalVariableLib

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCore.c

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index f76a1b191fe5c53a756c0d123d4429d3465af2c0..a61d0b88575da4a5579331b7a59f3af80dd43b64 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -13,47 +13,36 @@
 *\r
 **/\r
 \r
-#include <PiPei.h>\r
-#include <Ppi/TemporaryRamSupport.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
 #include <Library/BaseLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
+#include <Library/DebugAgentLib.h>\r
+#include <Library/PrintLib.h>\r
 #include <Library/ArmLib.h>\r
-#include <Chipset/ArmV7.h>\r
+#include <Library/SerialPortLib.h>\r
 \r
-EFI_STATUS\r
-EFIAPI\r
-SecTemporaryRamSupport (\r
-  IN CONST EFI_PEI_SERVICES   **PeiServices,\r
-  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,\r
-  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,\r
-  IN UINTN                    CopySize\r
-  );\r
+#include <Ppi/ArmGlobalVariable.h>\r
+#include <Chipset/ArmV7.h>\r
 \r
-VOID\r
-SecSwitchStack (\r
-  INTN    StackDelta\r
-  );\r
+#include "PrePeiCore.h"\r
 \r
 EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};\r
+ARM_GLOBAL_VARIABLE_PPI             mGlobalVariablePpi = { PrePeiCoreGetGlobalVariableMemory };\r
 \r
-EFI_PEI_PPI_DESCRIPTOR      gSecPpiTable[] = {\r
+EFI_PEI_PPI_DESCRIPTOR      gCommonPpiTable[] = {\r
   {\r
-    EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
+    EFI_PEI_PPI_DESCRIPTOR_PPI,\r
     &gEfiTemporaryRamSupportPpiGuid,\r
     &mSecTemporaryRamSupportPpi\r
+  },\r
+  {\r
+    EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
+    &gArmGlobalVariablePpiGuid,\r
+    &mGlobalVariablePpi\r
   }\r
 };\r
 \r
-// Vector Table for Pei Phase\r
-VOID  PeiVectorTable (VOID);\r
-\r
-\r
 VOID\r
 CEntryPoint (\r
-  IN  UINTN                     CoreId,\r
+  IN  UINTN                     MpId,\r
   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint\r
   )\r
 {\r
@@ -64,8 +53,8 @@ CEntryPoint (
   ArmInvalidateInstructionCache();\r
 \r
   // Enable Instruction & Data caches\r
-  ArmEnableDataCache();\r
-  ArmEnableInstructionCache();\r
+  ArmEnableDataCache ();\r
+  ArmEnableInstructionCache ();\r
 \r
   //\r
   // Note: Doesn't have to Enable CPU interface in non-secure world,\r
@@ -79,11 +68,15 @@ CEntryPoint (
   //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r
 \r
   //If not primary Jump to Secondary Main\r
-  if(0 == CoreId) {\r
-    //Goto primary Main.\r
-    primary_main(PeiCoreEntryPoint);\r
+  if (IS_PRIMARY_CORE(MpId)) {\r
+    // Initialize the Debug Agent for Source Level Debugging\r
+    InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
+    SaveAndSetDebugTimerInterrupt (TRUE);\r
+\r
+    // Goto primary Main.\r
+    PrimaryMain (PeiCoreEntryPoint);\r
   } else {\r
-    secondary_main(CoreId);\r
+    SecondaryMain (MpId);\r
   }\r
 \r
   // PEI Core should always load and never return\r
@@ -101,7 +94,7 @@ SecTemporaryRamSupport (
 {\r
   //\r
   // Migrate the whole temporary memory to permenent memory.\r
-  // \r
+  //\r
   CopyMem (\r
     (VOID*)(UINTN)PermanentMemoryBase, \r
     (VOID*)(UINTN)TemporaryMemoryBase, \r
@@ -110,6 +103,17 @@ SecTemporaryRamSupport (
 \r
   SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));\r
 \r
+EFI_STATUS\r
+PrePeiCoreGetGlobalVariableMemory (\r
+  OUT EFI_PHYSICAL_ADDRESS    *GlobalVariableBase\r
+  )\r
+{\r
+  ASSERT (GlobalVariableBase != NULL);\r
+\r
+  *GlobalVariableBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) +\r
+                        (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -\r
+                        (UINTN)PcdGet32 (PcdPeiGlobalVariableSize);\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r