ArmPlatformPkg: Updated the stack setup to have the same geometry between the Secure...

[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCoreEntryPoint.asm

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
index e214ed3744f755372abecc39d83b823d6430840e..60f6051b90bb2c456f554f0bfd61efbe1eb620d4 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
@@ -19,6 +19,7 @@
   INCLUDE AsmMacroIoLib.inc\r
   \r
   IMPORT  CEntryPoint\r
+  IMPORT  ArmReadMpidr\r
   EXPORT  _ModuleEntryPoint\r
   \r
   PRESERVE8\r
@@ -28,42 +29,61 @@ StartupAddr        DCD      CEntryPoint
 \r
 _ModuleEntryPoint\r
   // Identify CPU ID\r
-  mrc   p15, 0, r0, c0, c0, 5\r
-  and   r0, #0xf\r
-\r
-_SetupStack\r
-  // Setup Stack for the 4 CPU cores\r
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)\r
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)\r
+  bl    ArmReadMpidr\r
+  // Get ID of this CPU in Multicore system\r
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
+  and   r5, r0, r1\r
   \r
-  mov   r3, r0              // r3 = core_id\r
-  mul   r3, r3, r2          // r3 = core_id * stack_size = offset from the stack base\r
-  add   r3, r3, r1          // r3 = stack_base + offset\r
-  add   r3, r3, r2, LSR #1  // r3 = stack_offset + (stack_size/2) <-- the top half is for the heap\r
-  mov   sp, r3\r
+  // Get the top of the primary stacks (and the base of the secondary stacks)\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+  add   r1, r1, r2\r
+\r
+  // Is it the Primary Core ?\r
+  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)\r
+  cmp   r5, r3\r
+  beq   _SetupPrimaryCoreStack\r
 \r
-  // Only allocate memory in top of the primary core stack\r
-  cmp   r0, #0\r
-  bne   _PrepareArguments\r
+_SetupSecondaryCoreStack\r
+  // r1 contains the base of the secondary stacks\r
 \r
-_AllocateGlobalPeiVariables\r
-  // Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)\r
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)\r
-  sub   sp, sp, r1\r
+  // Get the Core Position (ClusterId * 4) + CoreId\r
+  GetCorePositionInStack(r0, r5, r2)\r
+  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
+  add   r0, r0, #1\r
+\r
+  // StackOffset = CorePos * StackSize\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
+  mul   r0, r0, r2\r
+  // SP = StackBase + StackOffset\r
+  add   sp, r1, r0\r
 \r
 _PrepareArguments\r
   // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
-  LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)\r
+  LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
   add   r2, r2, #4\r
   ldr   r1, [r2]\r
 \r
-  // move sec startup address into a data register\r
-  // ensure we're jumping to FV version of the code (not boot remapped alias)\r
-  ldr   r2, StartupAddr\r
-\r
-  // jump to PrePeiCore C code\r
-  //    r0 = core_id\r
+  // Move sec startup address into a data register\r
+  // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
+  ldr   r3, StartupAddr\r
+  \r
+  // Jump to PrePeiCore C code\r
+  //    r0 = mp_id\r
   //    r1 = pei_core_address\r
-  blx   r2\r
+  mov   r0, r5\r
+  blx   r3\r
+\r
+_SetupPrimaryCoreStack\r
+  // r1 contains the top of the primary stack\r
+  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
+\r
+  // The reserved space for global variable must be 8-bytes aligned for pushing\r
+  // 64-bit variable on the stack\r
+  SetPrimaryStack (r1, r2, r3)\r
+  b     _PrepareArguments\r
+\r
+_NeverReturn\r
+  b _NeverReturn\r
 \r
   END\r