FatBinPkg: Update EBC/IA32/X64/IPF binaries

[mirror_edk2.git] / ArmPlatformPkg / PrePi / MainMPCore.c

diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c
index 998a7763f4a45fd08f1f5704e6a32da78fe9fea3..bf813730d341aef0bcc65339f92aee49f92b1f04 100644 (file)
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -1,6 +1,6 @@
 /** @file\r
 *\r
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
@@ -26,13 +26,6 @@ PrimaryMain (
   IN  UINT64                    StartTimeStamp\r
   )\r
 {\r
-  // Check PcdGicPrimaryCoreId has been set in case the Primary Core is not the core 0 of Cluster 0\r
-  DEBUG_CODE_BEGIN();\r
-  if ((PcdGet32(PcdArmPrimaryCore) != 0) && (PcdGet32 (PcdGicPrimaryCoreId) == 0)) {\r
-    DEBUG((EFI_D_WARN,"Warning: the PCD PcdGicPrimaryCoreId does not seem to be set up for the configuration.\n"));\r
-  }\r
-  DEBUG_CODE_END();\r
-\r
   // Enable the GIC Distributor\r
   ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
 \r
@@ -62,7 +55,8 @@ SecondaryMain (
   UINT32                  CoreId;\r
   VOID                    (*SecondaryStart)(VOID);\r
   UINTN                   SecondaryEntryAddr;\r
-  UINTN                   AcknowledgedCoreId;\r
+  UINTN                   AcknowledgeInterrupt;\r
+  UINTN                   InterruptId;\r
 \r
   ClusterId = GET_CLUSTER_ID(MpId);\r
   CoreId    = GET_CORE_ID(MpId);\r
@@ -95,8 +89,13 @@ SecondaryMain (
     SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);\r
 \r
     // Acknowledge the interrupt and send End of Interrupt signal.\r
-    ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), &AcknowledgedCoreId, NULL);\r
-  } while ((SecondaryEntryAddr == 0) && (AcknowledgedCoreId != PcdGet32 (PcdGicPrimaryCoreId)));\r
+    AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);\r
+    // Check if it is a valid interrupt ID\r
+    if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {\r
+      // Got a valid SGI number hence signal End of Interrupt\r
+      ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);\r
+    }\r
+  } while (SecondaryEntryAddr == 0);\r
 \r
   // Jump to secondary core entry point.\r
   SecondaryStart = (VOID (*)())SecondaryEntryAddr;\r