//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
#include <Library/PcdLib.h>\r
#include <AutoGen.h>\r
\r
+#include <Chipset/ArmV7.h>\r
+\r
.text\r
.align 3\r
\r
-# Global symbols referenced by this module\r
GCC_ASM_IMPORT(CEntryPoint)\r
+GCC_ASM_IMPORT(ArmReadMpidr)\r
+GCC_ASM_IMPORT(ArmPlatformStackSet)\r
GCC_ASM_EXPORT(_ModuleEntryPoint)\r
\r
StartupAddr: .word CEntryPoint\r
\r
\r
ASM_PFX(_ModuleEntryPoint):\r
- // Identify CPU ID\r
- mrc p15, 0, r0, c0, c0, 5\r
- and r0, #0xf\r
+ // Get ID of this CPU in Multicore system\r
+ bl ASM_PFX(ArmReadMpidr)\r
+ LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
+ and r6, r0, r1\r
\r
_SetSVCMode:\r
- // Enter SVC mode\r
- mov r1, #0x13|0x80|0x40\r
+ // Enter SVC mode, Disable FIQ and IRQ\r
+ mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)\r
msr CPSR_c, r1\r
\r
-// Check if we can install the size at the top of the System Memory or if we need\r
+// Check if we can install the stack at the top of the System Memory or if we need\r
// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
// at the top of the DRAM)\r
_SetupStackPosition:\r
// Compute Top of System Memory\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r
+ sub r2, r2, #1\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
\r
// Calculate Top of the Firmware Device\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)\r
- add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r
+ sub r3, r3, #1\r
+ add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
//\r
\r
// Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
- subs r5, r1, r3 // r5 = SystemMemoryTop - FdTop\r
- bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop)\r
- cmp r5, r4\r
+ subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
+ cmp r0, r4\r
bge _SetupStack\r
\r
// Case the top of stacks is the FdBaseAddress\r
mov r1, r2\r
\r
_SetupStack:\r
- // Compute Base of Normal stacks for CPU Cores\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r5)\r
- mul r3, r0, r5 // r3 = core_id * stack_size = offset from the stack base\r
- sub sp, r1, r3 // r3 = (SystemMemoryTop|FdBaseAddress) - StackOffset = TopOfStack\r
-\r
+ // r1 contains the top of the stack (and the UEFI Memory)\r
+\r
+ // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
+ // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
+ // top of the memory space)\r
+ adds r7, r1, #1\r
+ bcs _SetupOverflowStack\r
+\r
+_SetupAlignedStack:\r
+ mov r1, r7\r
+ b _GetBaseUefiMemory\r
+\r
+_SetupOverflowStack:\r
+ // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
+ // aligned (4KB)\r
+ LoadConstantToReg (EFI_PAGE_MASK, r7)\r
+ and r7, r7, r1\r
+ sub r1, r1, r7\r
+\r
+_GetBaseUefiMemory:\r
// Calculate the Base of the UEFI Memory\r
- sub r1, r1, r4\r
-\r
- // Only allocate memory for global variables at top of the primary core stack\r
- cmp r0, #0\r
+ sub r7, r1, r4\r
+\r
+_GetStackBase:\r
+ // r1 = The top of the Mpcore Stacks\r
+ // Stack for the primary core = PrimaryCoreStack\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ sub r8, r1, r2\r
+\r
+ // Stack for the secondary core = Number of Cores - 1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
+ sub r0, r0, #1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
+ mul r1, r1, r0\r
+ sub r8, r8, r1\r
+\r
+ // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+ mov r0, r8\r
+ mov r1, r6\r
+ //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
+ bl ASM_PFX(ArmPlatformStackSet)\r
+\r
+ // Is it the Primary Core ?\r
+ LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
+ cmp r6, r4\r
bne _PrepareArguments\r
\r
-_AllocateGlobalPrePiVariables:\r
- // Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)\r
- LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r4)\r
- // The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack\r
- and r5, r4, #7\r
- rsb r5, r5, #8\r
- add r4, r4, r5\r
- sub sp, sp, r4\r
+_ReserveGlobalVariable:\r
+ LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r
+ // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r
+ InitializePrimaryStack(r0, r1)\r
\r
_PrepareArguments:\r
+ mov r0, r6\r
+ mov r1, r7\r
+ mov r2, r8\r
+ mov r3, sp\r
+\r
// Move sec startup address into a data register\r
// Ensure we're jumping to FV version of the code (not boot remapped alias)\r
- ldr r2, StartupAddr\r
+ ldr r4, StartupAddr\r
\r
// Jump to PrePiCore C code\r
- // r0 = core_id\r
+ // r0 = MpId\r
// r1 = UefiMemoryBase\r
- blx r2\r
+ // r2 = StacksBase\r
+ // r3 = GlobalVariableBase\r
+ blx r4\r
+\r
+_NeverReturn:\r
+ b _NeverReturn\r
\r
projects / mirror_edk2.git / blobdiff