ArmPkg: Fixed unsigned type to be architecture independent

[mirror_edk2.git] / ArmPlatformPkg / PrePi / ModuleEntryPoint.asm

diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
index e0b622103f8e98d9aad45c5dc7a06090c91ff887..5efdb532af5beb1d423915d8ee443e1894c9c120 100644 (file)
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
@@ -1,5 +1,5 @@
 //\r
-//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
 //\r
 //  This program and the accompanying materials\r
 //  are licensed and made available under the terms and conditions of the BSD License\r
@@ -16,11 +16,14 @@
 #include <Library/PcdLib.h>\r
 #include <AutoGen.h>\r
 \r
+#include <Chipset/ArmV7.h>\r
+\r
   INCLUDE AsmMacroIoLib.inc\r
   \r
   IMPORT  CEntryPoint\r
   IMPORT  ArmReadMpidr\r
-  IMPORT  ArmIsMpCore\r
+  IMPORT  ArmPlatformStackSet\r
+  \r
   EXPORT  _ModuleEntryPoint\r
 \r
   PRESERVE8\r
@@ -32,11 +35,11 @@ _ModuleEntryPoint
   // Get ID of this CPU in Multicore system\r
   bl    ArmReadMpidr\r
   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
-  and   r5, r0, r1\r
+  and   r6, r0, r1\r
 \r
 _SetSVCMode\r
   // Enter SVC mode, Disable FIQ and IRQ\r
-  mov     r1, #0x13 :OR: 0x80 :OR: 0x40\r
+  mov     r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)\r
   msr     CPSR_c, r1\r
 \r
 // Check if we can install the stack at the top of the System Memory or if we need\r
@@ -77,92 +80,59 @@ _SetupStack
   // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
   // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
   // top of the memory space)\r
-  adds  r6, r1, #1\r
+  adds  r7, r1, #1\r
   bcs   _SetupOverflowStack\r
 \r
 _SetupAlignedStack\r
-  mov   r1, r6\r
+  mov   r1, r7\r
   b     _GetBaseUefiMemory\r
 \r
 _SetupOverflowStack\r
   // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
   // aligned (4KB)\r
-  LoadConstantToReg (EFI_PAGE_MASK, r6)\r
-  and   r6, r6, r1\r
-  sub   r1, r1, r6\r
+  LoadConstantToReg (EFI_PAGE_MASK, r7)\r
+  and   r7, r7, r1\r
+  sub   r1, r1, r7\r
 \r
 _GetBaseUefiMemory\r
   // Calculate the Base of the UEFI Memory\r
-  sub   r6, r1, r4\r
+  sub   r7, r1, r4\r
 \r
 _GetStackBase\r
-  // Compute Base of Normal stacks for CPU Cores\r
-  // Is it MpCore system\r
-  bl    ArmIsMpCore\r
-  cmp   r0, #0\r
-  // Case it is not an MP Core system. Just setup the primary core\r
-  beq   _SetupUnicoreStack\r
-\r
-_GetStackBaseMpCore\r
   // r1 = The top of the Mpcore Stacks\r
   // Stack for the primary core = PrimaryCoreStack\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
-  sub   r7, r1, r2\r
-\r
-  // Stack for the secondary core = Number of Cluster * (4 Core per cluster) * SecondaryStackSize\r
-  LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)\r
-  lsl   r2, r2, #2\r
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
-  mul   r2, r2, r3\r
-  sub   r7, r7, r2\r
-\r
-  // The base of the secondary Stacks = Top of Primary stack\r
+  sub   r8, r1, r2\r
+\r
+  // Stack for the secondary core = Number of Cores - 1\r
+  LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
+  sub  r0, r0, #1\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
+  mul   r1, r1, r0\r
+  sub   r8, r8, r1\r
+\r
+  // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+  mov  r0, r8\r
+  mov  r1, r6\r
+  //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
-  add   r1, r7, r2\r
-\r
-  // r7 = The base of the MpCore Stacks (primary stack + cluster_count * 4 * secondary stacks)\r
-  // r1 = The base of the secondary Stacks = Top of the Primary stack\r
+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
+  bl   ArmPlatformStackSet\r
 \r
   // Is it the Primary Core ?\r
   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
-  cmp   r5, r4\r
-  beq   _SetupPrimaryCoreStack\r
-\r
-_SetupSecondaryCoreStack\r
-  // r1 = The base of the secondary Stacks\r
-\r
-  // Get the position of the cores (ClusterId * 4) + CoreId\r
-  GetCorePositionInStack(r0, r5, r4)\r
-  // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
-  add   r0, r0, #1\r
-  // Get the offset for the Secondary Stack\r
-  mul   r0, r0, r3\r
-  add   sp, r1, r0\r
-\r
+  cmp   r6, r4\r
   bne   _PrepareArguments\r
 \r
-_SetupPrimaryCoreStack\r
-  // r1 = Top of the primary stack\r
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
-  b     _PreparePrimaryStack\r
-\r
-_SetupUnicoreStack\r
-  // The top of the Unicore Stack is in r1\r
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)\r
-\r
-  // Calculate the bottom of the primary stack (StackBase)\r
-  sub   r7, r1, r3\r
-\r
-_PreparePrimaryStack\r
-  // The reserved space for global variable must be 8-bytes aligned for pushing\r
-  // 64-bit variable on the stack\r
-  SetPrimaryStack (r1, r2, r3)\r
+_ReserveGlobalVariable\r
+  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r
+  // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r
+  InitializePrimaryStack r0, r1\r
 \r
 _PrepareArguments\r
-  mov   r0, r5\r
-  mov   r1, r6\r
-  mov   r2, r7\r
+  mov   r0, r6\r
+  mov   r1, r7\r
+  mov   r2, r8\r
   mov   r3, sp\r
 \r
   // Move sec startup address into a data register\r