\r
#include "PrePi.h"\r
\r
-#define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) || \\r
+#define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) ||\\r
((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= FixedPcdGet64 (PcdSystemMemoryBase)))\r
\r
-UINT64 mSystemMemoryEnd = FixedPcdGet64(PcdSystemMemoryBase) +\r
- FixedPcdGet64(PcdSystemMemorySize) - 1;\r
+UINT64 mSystemMemoryEnd = FixedPcdGet64 (PcdSystemMemoryBase) +\r
+ FixedPcdGet64 (PcdSystemMemorySize) - 1;\r
\r
EFI_STATUS\r
GetPlatformPpi (\r
\r
PpiListSize = 0;\r
ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
- PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
+ PpiListCount = PpiListSize / sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r
*Ppi = PpiList->Ppi;\r
\r
VOID\r
PrePiMain (\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase,\r
- IN UINT64 StartTimeStamp\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase,\r
+ IN UINT64 StartTimeStamp\r
)\r
{\r
- EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r
- ARM_MP_CORE_INFO_PPI* ArmMpCoreInfoPpi;\r
- UINTN ArmCoreCount;\r
- ARM_CORE_INFO* ArmCoreInfoTable;\r
- EFI_STATUS Status;\r
- CHAR8 Buffer[100];\r
- UINTN CharCount;\r
- UINTN StacksSize;\r
- FIRMWARE_SEC_PERFORMANCE Performance;\r
+ EFI_HOB_HANDOFF_INFO_TABLE *HobList;\r
+ ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;\r
+ UINTN ArmCoreCount;\r
+ ARM_CORE_INFO *ArmCoreInfoTable;\r
+ EFI_STATUS Status;\r
+ CHAR8 Buffer[100];\r
+ UINTN CharCount;\r
+ UINTN StacksSize;\r
+ FIRMWARE_SEC_PERFORMANCE Performance;\r
\r
// If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r
- ASSERT (IS_XIP() ||\r
- ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&\r
- ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd)));\r
+ ASSERT (\r
+ IS_XIP () ||\r
+ ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&\r
+ ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd))\r
+ );\r
\r
// Initialize the architecture specific bits\r
ArchInitialize ();\r
\r
// Initialize the Serial Port\r
SerialPortInitialize ();\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r
- (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r
- SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
+ CharCount = AsciiSPrint (\r
+ Buffer,\r
+ sizeof (Buffer),\r
+ "UEFI firmware (version %s built at %a on %a)\n\r",\r
+ (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString),\r
+ __TIME__,\r
+ __DATE__\r
+ );\r
+ SerialPortWrite ((UINT8 *)Buffer, CharCount);\r
\r
// Initialize the Debug Agent for Source Level Debugging\r
InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
\r
// Declare the PI/UEFI memory region\r
HobList = HobConstructor (\r
- (VOID*)UefiMemoryBase,\r
- FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
- (VOID*)UefiMemoryBase,\r
- (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
- );\r
+ (VOID *)UefiMemoryBase,\r
+ FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
+ (VOID *)UefiMemoryBase,\r
+ (VOID *)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
+ );\r
PrePeiSetHobList (HobList);\r
\r
// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
} else {\r
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
}\r
+\r
BuildStackHob (StacksBase, StacksSize);\r
\r
- //TODO: Call CpuPei as a library\r
+ // TODO: Call CpuPei as a library\r
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));\r
\r
if (ArmIsMpCore ()) {\r
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid\r
- Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
+ Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID **)&ArmMpCoreInfoPpi);\r
\r
// On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
ASSERT_EFI_ERROR (Status);\r
\r
// Build the MP Core Info Table\r
ArmCoreCount = 0;\r
- Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
- if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {\r
+ Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
+ if (!EFI_ERROR (Status) && (ArmCoreCount > 0)) {\r
// Build MPCore Info HOB\r
BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);\r
}\r
\r
VOID\r
CEntryPoint (\r
- IN UINTN MpId,\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase\r
+ IN UINTN MpId,\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase\r
)\r
{\r
- UINT64 StartTimeStamp;\r
+ UINT64 StartTimeStamp;\r
\r
// Initialize the platform specific controllers\r
ArmPlatformInitialize (MpId);\r
ArmEnableInstructionCache ();\r
\r
// Define the Global Variable region when we are not running in XIP\r
- if (!IS_XIP()) {\r
+ if (!IS_XIP ()) {\r
if (ArmPlatformIsPrimaryCore (MpId)) {\r
- if (ArmIsMpCore()) {\r
+ if (ArmIsMpCore ()) {\r
// Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)\r
ArmCallSEV ();\r
}\r
\r
// If not primary Jump to Secondary Main\r
if (ArmPlatformIsPrimaryCore (MpId)) {\r
-\r
- InvalidateDataCacheRange ((VOID *)UefiMemoryBase,\r
- FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
+ InvalidateDataCacheRange (\r
+ (VOID *)UefiMemoryBase,\r
+ FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)\r
+ );\r
\r
// Goto primary Main.\r
PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
projects / mirror_edk2.git / blobdiff