/** @file\r
*\r
-* Copyright (c) 2011, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
\r
#include <PiPei.h>\r
\r
+#include <Library/ArmCpuLib.h>\r
#include <Library/DebugAgentLib.h>\r
#include <Library/PrePiLib.h>\r
-#include <Library/IoLib.h>\r
#include <Library/PrintLib.h>\r
#include <Library/PeCoffGetEntryPointLib.h>\r
+#include <Library/PrePiHobListPointerLib.h>\r
#include <Library/TimerLib.h>\r
#include <Library/PerformanceLib.h>\r
\r
#include <Ppi/GuidedSectionExtraction.h>\r
#include <Guid/LzmaDecompress.h>\r
+#include <Guid/ArmGlobalVariableHob.h>\r
\r
#include "PrePi.h"\r
#include "LzmaDecompress.h"\r
\r
+#define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \\r
+ ((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet32 (PcdSystemMemoryBase)))\r
+\r
+// Not used when PrePi in run in XIP mode\r
+UINTN mGlobalVariableBase = 0;\r
+\r
VOID\r
PrePiCommonExceptionEntry (\r
IN UINT32 Entry,\r
VOID\r
);\r
\r
+VOID\r
+EFIAPI\r
+BuildGlobalVariableHob (\r
+ IN EFI_PHYSICAL_ADDRESS GlobalVariableBase,\r
+ IN UINT32 GlobalVariableSize\r
+ )\r
+{\r
+ ARM_HOB_GLOBAL_VARIABLE *Hob;\r
+\r
+ Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, sizeof (ARM_HOB_GLOBAL_VARIABLE));\r
+ ASSERT(Hob != NULL);\r
+\r
+ CopyGuid (&(Hob->Header.Name), &gArmGlobalVariableGuid);\r
+ Hob->GlobalVariableBase = GlobalVariableBase;\r
+ Hob->GlobalVariableSize = GlobalVariableSize;\r
+}\r
+\r
VOID\r
PrePiMain (\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase,\r
+ IN UINTN StacksBase,\r
+ IN UINTN GlobalVariableBase,\r
IN UINT64 StartTimeStamp\r
)\r
{\r
- EFI_HOB_HANDOFF_INFO_TABLE** PrePiHobBase;\r
+ EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r
EFI_STATUS Status;\r
CHAR8 Buffer[100];\r
UINTN CharCount;\r
+ UINTN StacksSize;\r
+\r
+ // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r
+ ASSERT (IS_XIP() || \r
+ ((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet32 (PcdSystemMemoryBase)) &&\r
+ ((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize)))));\r
\r
// Enable program flow prediction, if supported.\r
ArmEnableBranchPrediction ();\r
\r
// Initialize the Serial Port\r
SerialPortInitialize ();\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__);\r
+ CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r
+ (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r
SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
\r
// Initialize the Debug Agent for Source Level Debugging\r
InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
SaveAndSetDebugTimerInterrupt (TRUE);\r
-\r
- PrePiHobBase = (EFI_HOB_HANDOFF_INFO_TABLE**)(PcdGet32 (PcdCPUCoresNonSecStackBase) + (PcdGet32 (PcdCPUCoresNonSecStackSize) / 2) - PcdGet32 (PcdHobListPtrGlobalOffset));\r
-\r
- // We leave UINT32 at the top of UEFI memory for PcdPrePiHobBase\r
- *PrePiHobBase = HobConstructor (\r
+ \r
+ // Declare the PI/UEFI memory region\r
+ HobList = HobConstructor (\r
(VOID*)UefiMemoryBase,\r
FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
(VOID*)UefiMemoryBase,\r
- (VOID*)(UefiMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize) - sizeof(UINT32)));\r
+ (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
+ );\r
+ PrePeiSetHobList (HobList);\r
\r
// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
ASSERT_EFI_ERROR (Status);\r
\r
- // Create the Stack HOB\r
- BuildStackHob (StackBase, FixedPcdGet32(PcdCPUCoresNonSecStackSize));\r
+ // Create the Stacks HOB (reserve the memory for all stacks)\r
+ if (ArmIsMpCore ()) {\r
+ StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) + (FixedPcdGet32(PcdClusterCount) * 4 * FixedPcdGet32(PcdCPUCoreSecondaryStackSize));\r
+ } else {\r
+ StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
+ }\r
+ BuildStackHob (StacksBase, StacksSize);\r
+\r
+ // Declare the Global Variable HOB\r
+ BuildGlobalVariableHob (GlobalVariableBase, FixedPcdGet32 (PcdPeiGlobalVariableSize));\r
+\r
+ //TODO: Call CpuPei as a library\r
+ BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
\r
// Set the Boot Mode\r
SetBootMode (ArmPlatformGetBootMode ());\r
Status = PlatformPeim ();\r
ASSERT_EFI_ERROR (Status);\r
\r
- BuildMemoryTypeInformationHob ();\r
-\r
- //InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);\r
- //SaveAndSetDebugTimerInterrupt (TRUE);\r
-\r
// Now, the HOB List has been initialized, we can register performance information\r
PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r
\r
\r
VOID\r
CEntryPoint (\r
- IN UINTN CoreId,\r
+ IN UINTN MpId,\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase\r
+ IN UINTN StacksBase,\r
+ IN UINTN GlobalVariableBase\r
)\r
{\r
UINT64 StartTimeStamp;\r
+ \r
+ // Initialize the platform specific controllers\r
+ ArmPlatformInitialize (MpId);\r
\r
- StartTimeStamp = 0;\r
-\r
- if ((CoreId == 0) && PerformanceMeasurementEnabled ()) {\r
+ if (IS_PRIMARY_CORE(MpId) && PerformanceMeasurementEnabled ()) {\r
// Initialize the Timer Library to setup the Timer HW controller\r
TimerConstructor ();\r
// We cannot call yet the PerformanceLib because the HOB List has not been initialized\r
StartTimeStamp = GetPerformanceCounter ();\r
+ } else {\r
+ StartTimeStamp = 0;\r
}\r
\r
- //Clean Data cache\r
- ArmCleanInvalidateDataCache();\r
+ // Clean Data cache\r
+ ArmCleanInvalidateDataCache ();\r
\r
- //Invalidate instruction cache\r
- ArmInvalidateInstructionCache();\r
+ // Invalidate instruction cache\r
+ ArmInvalidateInstructionCache ();\r
\r
//TODO:Drain Write Buffer\r
\r
// Enable Instruction & Data caches\r
- ArmEnableDataCache();\r
- ArmEnableInstructionCache();\r
-\r
+ ArmEnableDataCache ();\r
+ ArmEnableInstructionCache ();\r
+\r
+ // Define the Global Variable region when we are not running in XIP\r
+ if (!IS_XIP()) {\r
+ if (IS_PRIMARY_CORE(MpId)) {\r
+ mGlobalVariableBase = GlobalVariableBase;\r
+ if (ArmIsMpCore()) {\r
+ ArmCpuSynchronizeSignal (ARM_CPU_EVENT_DEFAULT);\r
+ }\r
+ } else {\r
+ // Wait the Primay core has defined the address of the Global Variable region\r
+ ArmCpuSynchronizeWait (ARM_CPU_EVENT_DEFAULT);\r
+ }\r
+ }\r
+ \r
// Write VBAR - The Vector table must be 32-byte aligned\r
- ASSERT(((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);\r
- ArmWriteVBar((UINT32)PrePiVectorTable);\r
+ ASSERT (((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);\r
+ ArmWriteVBar ((UINT32)PrePiVectorTable);\r
\r
- //If not primary Jump to Secondary Main\r
- if(0 == CoreId) {\r
+ // If not primary Jump to Secondary Main\r
+ if (IS_PRIMARY_CORE(MpId)) {\r
// Goto primary Main.\r
- PrimaryMain (UefiMemoryBase, StackBase, StartTimeStamp);\r
+ PrimaryMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);\r
} else {\r
- SecondaryMain (CoreId);\r
+ SecondaryMain (MpId);\r
}\r
\r
// DXE Core should always load and never return\r
projects / mirror_edk2.git / blobdiff