#========================================================================================\r
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
orr x0, x0, #(1 << 31) // Set EL1 to be 64bit\r
\r
// Send all interrupts to their respective Exception levels for EL2\r
- bic x0, x0, #(1 << 3) // Disable virtual FIQ\r
- bic x0, x0, #(1 << 4) // Disable virtual IRQ\r
- bic x0, x0, #(1 << 5) // Disable virtual SError and Abort\r
+ and x0, x0, #~(ARM_HCR_FMO | ARM_HCR_IMO | ARM_HCR_AMO) // Disable virtual FIQ, IRQ, SError and Abort\r
msr hcr_el2, x0 // Write back our settings\r
\r
msr cptr_el2, xzr // Disable copro traps to EL2\r