/** @file
* Main file supporting the SEC Phase on ARM Platforms
*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
*
**/
+#include <Library/ArmTrustedMonitorLib.h>
#include <Library/DebugAgentLib.h>
#include <Library/PrintLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/SerialPortLib.h>
#include <Library/ArmGicLib.h>
-#include <Library/ArmCpuLib.h>
#include "SecInternal.h"
#define SerialPrint(txt) SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
-extern VOID *monitor_vector_table;
-
VOID
CEntryPoint (
- IN UINTN MpId
+ IN UINTN MpId,
+ IN UINTN SecBootMode
)
{
CHAR8 Buffer[100];
if (FixedPcdGet32 (PcdVFPEnabled)) {
ArmEnableVFP();
}
-
+
+ // Initialize peripherals that must be done at the early stage
+ // Example: Some L2 controller, interconnect, clock, DMC, etc
+ ArmPlatformSecInitialize (MpId);
+
// Primary CPU clears out the SCU tag RAMs, secondaries wait
- if (IS_PRIMARY_CORE(MpId)) {
+ if (IS_PRIMARY_CORE(MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) {
if (ArmIsMpCore()) {
- ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT);
+ // Signal for the initial memory is configured (event: BOOT_MEM_INIT)
+ ArmCallSEV ();
}
// SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
SerialPortInitialize ();
// Start talking
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__);
+ if (FixedPcdGetBool (PcdTrustzoneSupport)) {
+ CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Secure firmware (version %s built at %a on %a)\n\r",
+ (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
+ } else {
+ CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Boot firmware (version %s built at %a on %a)\n\r",
+ (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
+ }
SerialPortWrite ((UINT8 *) Buffer, CharCount);
// Initialize the Debug Agent for Source Level Debugging
InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
SaveAndSetDebugTimerInterrupt (TRUE);
- // Now we've got UART, make the check:
- // - The Vector table must be 32-byte aligned
- ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0);
-
// Enable the GIC distributor and CPU Interface
// - no other Interrupts are enabled, doesn't have to worry about the priority.
// - all the cores are in secure state, use secure SGI's
}
// Enable Full Access to CoProcessors
- ArmWriteCPACR (CPACR_CP_FULL_ACCESS);
-
- if (IS_PRIMARY_CORE(MpId)) {
- // Initialize peripherals that must be done at the early stage
- // Example: Some L2x0 controllers must be initialized in Secure World
- ArmPlatformSecInitialize ();
-
- // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
- // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
- if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
- // Initialize system memory (DRAM)
- ArmPlatformInitializeSystemMemory ();
- }
- }
+ ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
// Test if Trustzone is supported on this platform
if (FixedPcdGetBool (PcdTrustzoneSupport)) {
- // Ensure the Monitor Stack Base & Size have been set
- ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0);
- ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0);
-
if (ArmIsMpCore()) {
// Setup SMP in Non Secure world
ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
}
- // Enter Monitor Mode
- enter_monitor_mode ((VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * GET_CORE_POS(MpId))));
-
- //Write the monitor mode vector table address
- ArmWriteVMBar((UINT32) &monitor_vector_table);
-
- //-------------------- Monitor Mode ---------------------
- // Setup the Trustzone Chipsets
- if (IS_PRIMARY_CORE(MpId)) {
- ArmPlatformTrustzoneInit ();
-
- // Waiting for the Primary Core to have finished to initialize the Secure World
- ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT);
- } else {
- // The secondary cores need to wait until the Trustzone chipsets configuration is done
- // before switching to Non Secure World
-
- // Waiting for the Primary Core to have finished to initialize the Secure World
- ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT);
- }
-
- // Transfer the interrupt to Non-secure World
- ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
-
- // Write to CP15 Non-secure Access Control Register
- ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
+ // Either we use the Secure Stacks for Secure Monitor (in this case (Base == 0) && (Size == 0))
+ // Or we use separate Secure Monitor stacks (but (Base != 0) && (Size != 0))
+ ASSERT (((PcdGet32(PcdCPUCoresSecMonStackBase) == 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) == 0)) ||
+ ((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0)));
- // CP15 Secure Configuration Register
- ArmWriteScr (PcdGet32 (PcdArmScr));
+ // Enter Monitor Mode
+ enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
} else {
if (IS_PRIMARY_CORE(MpId)) {
SerialPrint ("Trust Zone Configuration is disabled\n\r");
// If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
// Status Register as the the current one (CPSR).
copy_cpsr_into_spsr ();
+
+ // Call the Platform specific function to execute additional actions if required
+ JumpAddress = PcdGet32 (PcdFvBaseAddress);
+ ArmPlatformSecExtraAction (MpId, &JumpAddress);
+
+ NonTrustedWorldTransition (MpId, JumpAddress);
+ }
+ ASSERT (0); // We must never return from the above function
+}
+
+VOID
+TrustedWorldInitialization (
+ IN UINTN MpId,
+ IN UINTN SecBootMode
+ )
+{
+ UINTN JumpAddress;
+
+ //-------------------- Monitor Mode ---------------------
+
+ // Set up Monitor World (Vector Table, etc)
+ ArmSecureMonitorWorldInitialize ();
+
+ // Transfer the interrupt to Non-secure World
+ ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
+
+ // Initialize platform specific security policy
+ ArmPlatformSecTrustzoneInit (MpId);
+
+ // Setup the Trustzone Chipsets
+ if (SecBootMode == ARM_SEC_COLD_BOOT) {
+ if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmIsMpCore()) {
+ // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
+ ArmCallSEV ();
+ }
+ } else {
+ // The secondary cores need to wait until the Trustzone chipsets configuration is done
+ // before switching to Non Secure World
+
+ // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
+ ArmCallWFE ();
+ }
}
+ // Call the Platform specific function to execute additional actions if required
JumpAddress = PcdGet32 (PcdFvBaseAddress);
ArmPlatformSecExtraAction (MpId, &JumpAddress);
+ // Write to CP15 Non-secure Access Control Register
+ ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
+
+ // CP15 Secure Configuration Register
+ ArmWriteScr (PcdGet32 (PcdArmScr));
+
+ NonTrustedWorldTransition (MpId, JumpAddress);
+}
+
+VOID
+NonTrustedWorldTransition (
+ IN UINTN MpId,
+ IN UINTN JumpAddress
+ )
+{
// If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
// By not set, the mode for Non Secure World is SVC
if (PcdGet32 (PcdArmNonSecModeTransition) != 0) {
ASSERT (FALSE);
}
-VOID
-SecCommonExceptionEntry (
- IN UINT32 Entry,
- IN UINT32 LR
- )
-{
- CHAR8 Buffer[100];
- UINTN CharCount;
-
- switch (Entry) {
- case 0:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);
- break;
- case 1:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);
- break;
- case 2:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);
- break;
- case 3:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);
- break;
- case 4:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);
- break;
- case 5:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);
- break;
- case 6:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);
- break;
- case 7:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);
- break;
- default:
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);
- break;
- }
- SerialPortWrite ((UINT8 *) Buffer, CharCount);
- while(1);
-}
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