Patch from open source community for CryptoPkg to allow it to build for ARM using...

[mirror_edk2.git] / ArmPlatformPkg / Sec / Sec.c

diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 4de49329d45b9e24fb9fa4b3dfef519abe907d5c..7106e90026aeb6a0cf669ca9b42d5d19f32691cb 100644 (file)
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -21,7 +21,6 @@
 #include <Library/ArmLib.h>
 #include <Chipset/ArmV7.h>
 #include <Drivers/PL390Gic.h>
-#include <Library/L2X0CacheLib.h>
 #include <Library/SerialPortLib.h>
 #include <Library/ArmPlatformLib.h>
 
@@ -106,8 +105,9 @@ CEntryPoint (
   }
 
   if (CoreId == 0) {
-    // Initialize L2X0 but not enabled
-    L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase), FALSE);
+    // Initialize peripherals that must be done at the early stage
+    // Example: Some L2x0 controllers must be initialized in Secure World
+    ArmPlatformInitialize ();
 
     // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
     // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
@@ -195,7 +195,7 @@ CEntryPoint (
   // If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
   if (FeaturePcdGet(PcdStandalone) == FALSE) {
     if (CoreId == 0) {
-      UINTN*   StartAddress = (UINTN*)PcdGet32(PcdEmbeddedFdBaseAddress);
+      UINTN*   StartAddress = (UINTN*)PcdGet32(PcdNormalFdBaseAddress);
 
       // Patch the DRAM to make an infinite loop at the start address
       *StartAddress = 0xEAFFFFFE; // opcode for while(1)
@@ -204,7 +204,7 @@ CEntryPoint (
       SerialPortWrite ((UINT8 *) Buffer, CharCount);
 
       // To enter into Non Secure state, we need to make a return from exception
-      return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress));
+      return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
     } else {
       // When the primary core is stopped by the hardware debugger to copy the firmware
       // into DRAM. The secondary cores are still running. As soon as the first bytes of
@@ -218,7 +218,7 @@ CEntryPoint (
     }
   } else {
     // To enter into Non Secure state, we need to make a return from exception
-    return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress));
+    return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
   }
   //-------------------- Non Secure Mode ---------------------
 
@@ -232,7 +232,7 @@ VOID NonSecureWaitForFirmware() {
   VOID (*secondary_start)(VOID);
 
   // The secondary cores will execute the fimrware once wake from WFI.
-  secondary_start = (VOID (*)())PcdGet32(PcdEmbeddedFdBaseAddress);
+  secondary_start = (VOID (*)())PcdGet32(PcdNormalFdBaseAddress);
 
   ArmCallWFI();