ArmPlatformPkg: Move PcdStandalone from Feature PCD to Fixed PCD

[mirror_edk2.git] / ArmPlatformPkg / Sec / Sec.c

diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 508f418ce33cef4a65bc5bbfcab8ef6b4ff554a9..faa012ab406c4487d4621fb1050af161b1903bf5 100644 (file)
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -27,7 +27,7 @@
 
 #define ARM_PRIMARY_CORE  0
 
-#define SerialPrint(txt)  SerialPortWrite (txt, AsciiStrLen(txt)+1);
+#define SerialPrint(txt)  SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
 
 extern VOID *monitor_vector_table;
 
@@ -115,24 +115,24 @@ CEntryPoint (
   if (CoreId == ARM_PRIMARY_CORE) {
     // Initialize peripherals that must be done at the early stage
     // Example: Some L2x0 controllers must be initialized in Secure World
-    ArmPlatformInitialize ();
+    ArmPlatformSecInitialize ();
 
     // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
     // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
-    if (FeaturePcdGet(PcdSkipPeiCore) || !FeaturePcdGet(PcdStandalone)) {
+    if (FeaturePcdGet(PcdSkipPeiCore) || !PcdGet32(PcdStandalone)) {
       // Initialize system memory (DRAM)
-      ArmPlatformInitializeSystemMemory();
+      ArmPlatformInitializeSystemMemory ();
     }
 
     // Some platform can change their physical memory mapping
-    ArmPlatformBootRemapping();
+    ArmPlatformBootRemapping ();
   }
 
   // Test if Trustzone is supported on this platform
   if (ArmPlatformTrustzoneSupported()) {
     if (FixedPcdGet32(PcdMPCoreSupport)) {
       // Setup SMP in Non Secure world
-      ArmSetupSmpNonSecure(CoreId);
+      ArmSetupSmpNonSecure (CoreId);
     }
 
     // Enter Monitor Mode
@@ -204,9 +204,9 @@ CEntryPoint (
   }
 
   // If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
-  if (FeaturePcdGet(PcdStandalone) == FALSE) {
+  if (!PcdGet32(PcdStandalone)) {
     if (CoreId == ARM_PRIMARY_CORE) {
-      UINTN*   StartAddress = (UINTN*)PcdGet32(PcdNormalFdBaseAddress);
+      UINTN*   StartAddress = (UINTN*)PcdGet32(PcdNormalFvBaseAddress);
 
       // Patch the DRAM to make an infinite loop at the start address
       *StartAddress = 0xEAFFFFFE; // opcode for while(1)
@@ -215,7 +215,7 @@ CEntryPoint (
       SerialPortWrite ((UINT8 *) Buffer, CharCount);
 
       // To enter into Non Secure state, we need to make a return from exception
-      return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
+      return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
     } else {
       // When the primary core is stopped by the hardware debugger to copy the firmware
       // into DRAM. The secondary cores are still running. As soon as the first bytes of
@@ -229,7 +229,7 @@ CEntryPoint (
     }
   } else {
     // To enter into Non Secure state, we need to make a return from exception
-    return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
+    return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
   }
   //-------------------- Non Secure Mode ---------------------
 
@@ -247,7 +247,7 @@ NonSecureWaitForFirmware (
   VOID (*secondary_start)(VOID);
 
   // The secondary cores will execute the firmware once wake from WFI.
-  secondary_start = (VOID (*)())PcdGet32(PcdNormalFdBaseAddress);
+  secondary_start = (VOID (*)())PcdGet32(PcdNormalFvBaseAddress);
 
   ArmCallWFI();