ArmPlatformPkg/Sec: Replaced hardcode SCR and NSACR values by PCDs to enable CPU...

[mirror_edk2.git] / ArmPlatformPkg / Sec / Sec.inf

diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf
index 9980c6b951ed51ab0ca396caf69803d2480b986f..f80db4a630797f4ea0e78375367ed6d32473e435 100644 (file)
--- a/ArmPlatformPkg/Sec/Sec.inf
+++ b/ArmPlatformPkg/Sec/Sec.inf
@@ -54,9 +54,16 @@
   gArmTokenSpaceGuid.PcdTrustzoneSupport\r
   gArmTokenSpaceGuid.PcdVFPEnabled\r
   \r
+  gArmTokenSpaceGuid.PcdArmScr\r
+  gArmTokenSpaceGuid.PcdArmNsacr\r
+  gArmTokenSpaceGuid.PcdArmNonSecModeTransition\r
+  \r
   gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
   gArmTokenSpaceGuid.PcdArmPrimaryCore\r
   \r
+  gArmTokenSpaceGuid.PcdSecureFvBaseAddress\r
+  gArmTokenSpaceGuid.PcdSecureFvSize\r
+  \r
   gArmTokenSpaceGuid.PcdFvBaseAddress\r
   \r
   gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase\r