ArmPlatformPkg/Sec: Moved Exception Vector Table to ArmPkg/DebugAgentBaseLib

[mirror_edk2.git] / ArmPlatformPkg / Sec / SecEntryPoint.S

diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S
index 42b18c40de3075c587c01e6326be1e58cd91d30c..92035a1ffe1bea7ad0342423f3ecf4c3119a7593 100644 (file)
--- a/ArmPlatformPkg/Sec/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.S
@@ -20,13 +20,11 @@
 \r
 GCC_ASM_IMPORT(CEntryPoint)\r
 GCC_ASM_IMPORT(ArmPlatformSecBootAction)\r
-GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)\r
+GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)\r
 GCC_ASM_IMPORT(ArmDisableInterrupts)\r
 GCC_ASM_IMPORT(ArmDisableCachesAndMmu)\r
-GCC_ASM_IMPORT(ArmWriteVBar)\r
 GCC_ASM_IMPORT(ArmReadMpidr)\r
-GCC_ASM_IMPORT(SecVectorTable)\r
-GCC_ASM_IMPORT(ArmCpuSynchronizeWait)\r
+GCC_ASM_IMPORT(ArmCallWFE)\r
 GCC_ASM_EXPORT(_ModuleEntryPoint)\r
 \r
 StartupAddr:        .word       ASM_PFX(CEntryPoint)\r
@@ -38,13 +36,12 @@ ASM_PFX(_ModuleEntryPoint):
   // Ensure that the MMU and caches are off\r
   bl    ASM_PFX(ArmDisableCachesAndMmu)\r
 \r
+  // By default, we are doing a cold boot\r
+  mov   r10, #ARM_SEC_COLD_BOOT\r
+\r
   // Jump to Platform Specific Boot Action function\r
   blx   ASM_PFX(ArmPlatformSecBootAction)\r
 \r
-  // Set VBAR to the start of the exception vectors in Secure Mode\r
-  LoadConstantToReg (ASM_PFX(SecVectorTable), r0)\r
-  bl    ASM_PFX(ArmWriteVBar)\r
-\r
 _IdentifyCpu:\r
   // Identify CPU ID\r
   bl    ASM_PFX(ArmReadMpidr)\r
@@ -59,14 +56,23 @@ _IdentifyCpu:
   beq   _InitMem\r
   \r
 _WaitInitMem:\r
-  mov   r0, #ARM_CPU_EVENT_BOOT_MEM_INIT\r
-  bl    ASM_PFX(ArmCpuSynchronizeWait)\r
+  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
+  // Otherwise we have to wait the Primary Core to finish the initialization\r
+  cmp   r10, #ARM_SEC_COLD_BOOT\r
+  bne   _SetupSecondaryCoreStack\r
+\r
+  // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)\r
+  bl    ASM_PFX(ArmCallWFE)\r
   // Now the Init Mem is initialized, we setup the secondary core stacks\r
   b     _SetupSecondaryCoreStack\r
   \r
 _InitMem:\r
+  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
+  cmp   r10, #ARM_SEC_COLD_BOOT\r
+  bne   _SetupPrimaryCoreStack\r
+\r
   // Initialize Init Boot Memory\r
-  bl    ASM_PFX(ArmPlatformInitializeBootMemory)\r
+  bl    ASM_PFX(ArmPlatformSecBootMemoryInit)\r
   \r
   // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)\r
   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)\r
@@ -91,7 +97,7 @@ _SetupSecondaryCoreStack:
   add   r1, r1, r2\r
 \r
   // Get the Core Position (ClusterId * 4) + CoreId\r
-  GetCorePositionInStack(r0, r5, r2)\r
+  GetCorePositionFromMpId(r0, r5, r2)\r
   // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
   add   r0, r0, #1\r
 \r
@@ -108,7 +114,9 @@ _PrepareArguments:
   \r
   // Jump to SEC C code\r
   //    r0 = mp_id\r
+  //    r1 = Boot Mode\r
   mov   r0, r5\r
+  mov   r1, r10\r
   blx   r3\r
   \r
 _NeverReturn:\r