ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()

[mirror_edk2.git] / ArmPlatformPkg / Sec / SecInternal.h

diff --git a/ArmPlatformPkg/Sec/SecInternal.h b/ArmPlatformPkg/Sec/SecInternal.h
index 4d1b0f60899bae7245eefa7242304da1d10ced7a..255059af5fa171b1288855d8fa05c33842a814a3 100644 (file)
--- a/ArmPlatformPkg/Sec/SecInternal.h
+++ b/ArmPlatformPkg/Sec/SecInternal.h
@@ -1,7 +1,7 @@
 /** @file\r
 *  Main file supporting the SEC Phase on ARM PLatforms\r
 *\r
-*  Copyright (c) 2011, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
@@ -20,6 +20,7 @@
 #include <Library/ArmLib.h>\r
 #include <Library/ArmCpuLib.h>\r
 #include <Library/ArmPlatformLib.h>\r
+#include <Library/ArmPlatformSecLib.h>\r
 #include <Library/BaseLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
@@ -27,30 +28,34 @@
 #define IS_ALIGNED(Address, Align) (((UINTN)Address & (Align-1)) == 0)\r
 \r
 VOID\r
-ArmSetupGicNonSecure (\r
-  IN  INTN          GicDistributorBase,\r
-  IN  INTN          GicInterruptInterfaceBase\r
-);\r
+TrustedWorldInitialization (\r
+  IN  UINTN                     MpId,\r
+  IN  UINTN                     SecBootMode\r
+  );\r
 \r
-// Vector Table for Sec Phase\r
 VOID\r
-SecVectorTable (\r
-  VOID\r
+NonTrustedWorldTransition (\r
+  IN  UINTN                     MpId,\r
+  IN  UINTN                     JumpAddress\r
   );\r
 \r
 VOID\r
-NonSecureWaitForFirmware (\r
-  VOID\r
-  );\r
+ArmSetupGicNonSecure (\r
+  IN  INTN                  GicDistributorBase,\r
+  IN  INTN                  GicInterruptInterfaceBase\r
+);\r
 \r
 VOID\r
 enter_monitor_mode (\r
-  IN VOID* Stack\r
+  IN UINTN                  MonitorEntryPoint,\r
+  IN UINTN                  MpId,\r
+  IN UINTN                  SecBootMode,\r
+  IN VOID*                  MonitorStackBase\r
   );\r
 \r
 VOID\r
 return_from_exception (\r
-  IN UINTN NonSecureBase\r
+  IN UINTN                  NonSecureBase\r
   );\r
 \r
 VOID\r
@@ -58,10 +63,15 @@ copy_cpsr_into_spsr (
   VOID\r
   );\r
 \r
+VOID\r
+set_non_secure_mode (\r
+  IN ARM_PROCESSOR_MODE     Mode\r
+  );\r
+\r
 VOID\r
 SecCommonExceptionEntry (\r
   IN UINT32 Entry,\r
-  IN UINT32 LR\r
+  IN UINTN  LR\r
   );\r
 \r
 #endif\r