/** @file\r
* Main file supporting the SEC Phase on ARM PLatforms\r
*\r
-* Copyright (c) 2011, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
#define __SEC_H__\r
\r
#include <Base.h>\r
+#include <Library/ArmLib.h>\r
+#include <Library/ArmCpuLib.h>\r
+#include <Library/ArmPlatformLib.h>\r
+#include <Library/ArmPlatformSecLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
-\r
-#include <Chipset/ArmV7.h>\r
+#include <Library/PcdLib.h>\r
\r
#define IS_ALIGNED(Address, Align) (((UINTN)Address & (Align-1)) == 0)\r
\r
VOID\r
-ArmSetupGicNonSecure (\r
- IN INTN GicDistributorBase,\r
- IN INTN GicInterruptInterfaceBase\r
-);\r
+TrustedWorldInitialization (\r
+ IN UINTN MpId,\r
+ IN UINTN SecBootMode\r
+ );\r
\r
-// Vector Table for Sec Phase\r
VOID\r
-SecVectorTable (\r
- VOID\r
+NonTrustedWorldTransition (\r
+ IN UINTN MpId,\r
+ IN UINTN JumpAddress\r
);\r
\r
VOID\r
-NonSecureWaitForFirmware (\r
- VOID\r
- );\r
+ArmSetupGicNonSecure (\r
+ IN INTN GicDistributorBase,\r
+ IN INTN GicInterruptInterfaceBase\r
+);\r
\r
VOID\r
enter_monitor_mode (\r
- IN VOID* Stack\r
+ IN UINTN MonitorEntryPoint,\r
+ IN UINTN MpId,\r
+ IN UINTN SecBootMode,\r
+ IN VOID* MonitorStackBase\r
);\r
\r
VOID\r
return_from_exception (\r
- IN UINTN NonSecureBase\r
+ IN UINTN NonSecureBase\r
);\r
\r
VOID\r
VOID\r
);\r
\r
+VOID\r
+set_non_secure_mode (\r
+ IN ARM_PROCESSOR_MODE Mode\r
+ );\r
+\r
VOID\r
SecCommonExceptionEntry (\r
IN UINT32 Entry,\r
- IN UINT32 LR\r
+ IN UINTN LR\r
);\r
\r
#endif\r