ArmVirtPkg/FdtPciHostBridgeLib: Refactor init/uninit of root bridge

[mirror_edk2.git] / ArmVirtPkg / Library / FdtPciHostBridgeLib / FdtPciHostBridgeLib.c

diff --git a/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c b/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
index d554479bf0de93ddb5f49442ccaf50facb0e86d6..3ec7992b6331e7d227bd1b456699dcafc739ba84 100644 (file)
--- a/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
+++ b/ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
@@ -7,6 +7,7 @@
 \r
 **/\r
 #include <PiDxe.h>\r
+#include <Library/BaseMemoryLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/DevicePathLib.h>\r
 #include <Library/DxeServicesTableLib.h>\r
@@ -20,37 +21,6 @@
 #include <Protocol/PciRootBridgeIo.h>\r
 #include <Protocol/PciHostBridgeResourceAllocation.h>\r
 \r
-#pragma pack(1)\r
-typedef struct {\r
-  ACPI_HID_DEVICE_PATH     AcpiDevicePath;\r
-  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
-} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
-#pragma pack ()\r
-\r
-STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {\r
-  {\r
-    {\r
-      ACPI_DEVICE_PATH,\r
-      ACPI_DP,\r
-      {\r
-        (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
-        (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r
-      }\r
-    },\r
-    EISA_PNP_ID(0x0A03),\r
-    0\r
-  },\r
-\r
-  {\r
-    END_DEVICE_PATH_TYPE,\r
-    END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
-    {\r
-      END_DEVICE_PATH_LENGTH,\r
-      0\r
-    }\r
-  }\r
-};\r
-\r
 //\r
 // We expect the "ranges" property of "pci-host-ecam-generic" to consist of\r
 // records like this.\r
@@ -319,11 +289,18 @@ PciHostBridgeGetRootBridges (
   UINTN *Count\r
   )\r
 {\r
-  UINT64              IoBase, IoSize;\r
-  UINT64              Mmio32Base, Mmio32Size;\r
-  UINT64              Mmio64Base, Mmio64Size;\r
-  UINT32              BusMin, BusMax;\r
-  EFI_STATUS          Status;\r
+  UINT64                   IoBase, IoSize;\r
+  UINT64                   Mmio32Base, Mmio32Size;\r
+  UINT64                   Mmio64Base, Mmio64Size;\r
+  UINT32                   BusMin, BusMax;\r
+  EFI_STATUS               Status;\r
+  UINT64                   Attributes;\r
+  UINT64                   AllocationAttributes;\r
+  PCI_ROOT_BRIDGE_APERTURE Io;\r
+  PCI_ROOT_BRIDGE_APERTURE Mem;\r
+  PCI_ROOT_BRIDGE_APERTURE MemAbove4G;\r
+  PCI_ROOT_BRIDGE_APERTURE PMem;\r
+  PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;\r
 \r
   if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {\r
     DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));\r
@@ -341,33 +318,29 @@ PciHostBridgeGetRootBridges (
     return NULL;\r
   }\r
 \r
-  *Count = 1;\r
+  ZeroMem (&Io, sizeof (Io));\r
+  ZeroMem (&Mem, sizeof (Mem));\r
+  ZeroMem (&MemAbove4G, sizeof (MemAbove4G));\r
+  ZeroMem (&PMem, sizeof (PMem));\r
+  ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G));\r
 \r
-  mRootBridge.Segment               = 0;\r
-  mRootBridge.Supports              = EFI_PCI_ATTRIBUTE_ISA_IO_16 |\r
-                                      EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |\r
-                                      EFI_PCI_ATTRIBUTE_VGA_IO_16  |\r
-                                      EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
-  mRootBridge.Attributes            = mRootBridge.Supports;\r
+  Attributes           = EFI_PCI_ATTRIBUTE_ISA_IO_16 |\r
+                         EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |\r
+                         EFI_PCI_ATTRIBUTE_VGA_IO_16  |\r
+                         EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
 \r
-  mRootBridge.DmaAbove4G            = TRUE;\r
-  mRootBridge.NoExtendedConfigSpace = FALSE;\r
-  mRootBridge.ResourceAssigned      = FALSE;\r
+  AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;\r
 \r
-  mRootBridge.AllocationAttributes  = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;\r
-\r
-  mRootBridge.Bus.Base              = BusMin;\r
-  mRootBridge.Bus.Limit             = BusMax;\r
-  mRootBridge.Io.Base               = IoBase;\r
-  mRootBridge.Io.Limit              = IoBase + IoSize - 1;\r
-  mRootBridge.Mem.Base              = Mmio32Base;\r
-  mRootBridge.Mem.Limit             = Mmio32Base + Mmio32Size - 1;\r
+  Io.Base              = IoBase;\r
+  Io.Limit             = IoBase + IoSize - 1;\r
+  Mem.Base             = Mmio32Base;\r
+  Mem.Limit            = Mmio32Base + Mmio32Size - 1;\r
 \r
   if (sizeof (UINTN) == sizeof (UINT64)) {\r
-    mRootBridge.MemAbove4G.Base       = Mmio64Base;\r
-    mRootBridge.MemAbove4G.Limit      = Mmio64Base + Mmio64Size - 1;\r
+    MemAbove4G.Base    = Mmio64Base;\r
+    MemAbove4G.Limit   = Mmio64Base + Mmio64Size - 1;\r
     if (Mmio64Size > 0) {\r
-      mRootBridge.AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;\r
+      AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;\r
     }\r
   } else {\r
     //\r
@@ -376,19 +349,41 @@ PciHostBridgeGetRootBridges (
     // BARs unless they are allocated below 4 GB. So ignore the range above\r
     // 4 GB in this case.\r
     //\r
-    mRootBridge.MemAbove4G.Base       = MAX_UINT64;\r
-    mRootBridge.MemAbove4G.Limit      = 0;\r
+    MemAbove4G.Base    = MAX_UINT64;\r
+    MemAbove4G.Limit   = 0;\r
   }\r
 \r
   //\r
   // No separate ranges for prefetchable and non-prefetchable BARs\r
   //\r
-  mRootBridge.PMem.Base             = MAX_UINT64;\r
-  mRootBridge.PMem.Limit            = 0;\r
-  mRootBridge.PMemAbove4G.Base      = MAX_UINT64;\r
-  mRootBridge.PMemAbove4G.Limit     = 0;\r
+  PMem.Base            = MAX_UINT64;\r
+  PMem.Limit           = 0;\r
+  PMemAbove4G.Base     = MAX_UINT64;\r
+  PMemAbove4G.Limit    = 0;\r
+\r
+  Status = PciHostBridgeUtilityInitRootBridge (\r
+    Attributes,\r
+    Attributes,\r
+    AllocationAttributes,\r
+    TRUE,\r
+    FALSE,\r
+    BusMin,\r
+    BusMax,\r
+    &Io,\r
+    &Mem,\r
+    &MemAbove4G,\r
+    &PMem,\r
+    &PMemAbove4G,\r
+    &mRootBridge\r
+    );\r
+  if (EFI_ERROR (Status)) {\r
+    DEBUG ((DEBUG_ERROR, "%a: failed to initialize PCI host bridge: %r\n",\r
+      __FUNCTION__, Status));\r
+    *Count = 0;\r
+    return NULL;\r
+  }\r
 \r
-  mRootBridge.DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath;\r
+  *Count = 1;\r
 \r
   return &mRootBridge;\r
 }\r
@@ -408,6 +403,7 @@ PciHostBridgeFreeRootBridges (
   )\r
 {\r
   ASSERT (Count == 1);\r
+  PciHostBridgeUtilityUninitRootBridge (Bridges);\r
 }\r
 \r
 /**\r