//\r
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
-// Copyright (c) 2015, Linaro Limited. All rights reserved.\r
+// Copyright (c) 2015-2016, Linaro Limited. All rights reserved.\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
\r
#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
-#include <AutoGen.h>\r
-\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
-GCC_ASM_IMPORT(ArmReadMpidr)\r
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)\r
-GCC_ASM_IMPORT(ArmPlatformStackSet)\r
-GCC_ASM_EXPORT(_ModuleEntryPoint)\r
-ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)\r
-\r
-ASM_PFX(mSystemMemoryEnd): .quad 0\r
\r
-__relocs:\r
- .long __reloc_base - __relocs\r
- .long __reloc_start - __relocs\r
- .long __reloc_end - __relocs\r
+ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)\r
\r
-ASM_PFX(_ModuleEntryPoint):\r
+ASM_FUNC(_ModuleEntryPoint)\r
//\r
// We are built as a ET_DYN PIE executable, so we need to process all\r
// relative relocations if we are executing from a different offset than we\r
// were linked at. This is only possible if we are running from RAM.\r
//\r
-\r
- adr r12, __relocs\r
- ldrd r4, r5, [r12]\r
- ldr r6, [r12, #8]\r
-\r
- add r4, r4, r12\r
- add r5, r5, r12\r
- add r6, r6, r12\r
+ ADRL (r4, __reloc_base)\r
+ ADRL (r5, __reloc_start)\r
+ ADRL (r6, __reloc_end)\r
\r
.Lreloc_loop:\r
cmp r5, r6\r
// at the top of the DRAM)\r
_SetupStackPosition:\r
// Compute Top of System Memory\r
- ldr r12, =PcdGet64 (PcdSystemMemoryBase)\r
- ldr r1, [r12]\r
- ldr r12, =PcdGet64 (PcdSystemMemorySize)\r
+ LDRL (r1, PcdGet64 (PcdSystemMemoryBase))\r
+ ADRL (r12, PcdGet64 (PcdSystemMemorySize))\r
ldrd r2, r3, [r12]\r
\r
// calculate the top of memory, and record it in mSystemMemoryEnd\r
moveq r1, r2\r
\r
// Calculate Top of the Firmware Device\r
- ldr r12, =PcdGet64 (PcdFdBaseAddress)\r
- ldr r2, [r12]\r
- ldr r3, =FixedPcdGet32 (PcdFdSize)\r
- sub r3, r3, #1\r
+ LDRL (r2, PcdGet64 (PcdFdBaseAddress))\r
+ MOV32 (r3, FixedPcdGet32 (PcdFdSize) - 1)\r
add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
+ MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))\r
\r
//\r
// Reserve the memory for the UEFI region (contain stacks on its top)\r
_SetupOverflowStack:\r
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
// aligned (4KB)\r
- LoadConstantToReg (EFI_PAGE_MASK, r11)\r
- and r11, r11, r1\r
- sub r1, r1, r11\r
+ MOV32 (r11, (~EFI_PAGE_MASK) & 0xffffffff)\r
+ and r1, r1, r11\r
\r
_GetBaseUefiMemory:\r
// Calculate the Base of the UEFI Memory\r
_GetStackBase:\r
// r1 = The top of the Mpcore Stacks\r
// Stack for the primary core = PrimaryCoreStack\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
sub r9, r1, r2\r
\r
// Stack for the secondary core = Number of Cores - 1\r
- LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
- sub r0, r0, #1\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
- mul r1, r1, r0\r
+ MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
sub r9, r9, r1\r
\r
// r9 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
mov r0, r9\r
mov r1, r10\r
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
+ MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
+ MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
bl ASM_PFX(ArmPlatformStackSet)\r
\r
// Is it the Primary Core ?\r
\r
_NeverReturn:\r
b _NeverReturn\r
+\r
+ASM_PFX(mSystemMemoryEnd): .quad 0\r