BaseTools: BaseTools changes for RISC-V platform.

[mirror_edk2.git] / BaseTools / Source / C / Common / PeCoffLoaderEx.c

diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
index e367836b96394012bbdd9806775fe1d6b3a7319e..588b3a2f84f5f123564c246a6f088c50d7862499 100644 (file)
--- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
+++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
@@ -3,6 +3,7 @@ IA32 and X64 Specific relocation fixups
 \r
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 --*/\r
@@ -61,6 +62,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define IMM64_SIGN_INST_WORD_POS_X      27\r
 #define IMM64_SIGN_VAL_POS_X            63\r
 \r
+UINT32 *RiscVHi20Fixup = NULL;\r
+\r
 RETURN_STATUS\r
 PeCoffLoaderRelocateIa32Image (\r
   IN UINT16      *Reloc,\r
@@ -93,6 +96,89 @@ Returns:
   return RETURN_UNSUPPORTED;\r
 }\r
 \r
+/*++\r
+\r
+Routine Description:\r
+\r
+  Performs an RISC-V specific relocation fixup\r
+\r
+Arguments:\r
+\r
+  Reloc      - Pointer to the relocation record\r
+\r
+  Fixup      - Pointer to the address to fix up\r
+\r
+  FixupData  - Pointer to a buffer to log the fixups\r
+\r
+  Adjust     - The offset to adjust the fixup\r
+\r
+Returns:\r
+\r
+  Status code\r
+\r
+--*/\r
+RETURN_STATUS\r
+PeCoffLoaderRelocateRiscVImage (\r
+  IN UINT16      *Reloc,\r
+  IN OUT CHAR8   *Fixup,\r
+  IN OUT CHAR8   **FixupData,\r
+  IN UINT64      Adjust\r
+  )\r
+{\r
+  UINT32 Value;\r
+  UINT32 Value2;\r
+  UINT32 OrgValue;\r
+\r
+  OrgValue = *(UINT32 *) Fixup;\r
+  OrgValue = OrgValue;\r
+  switch ((*Reloc) >> 12) {\r
+  case EFI_IMAGE_REL_BASED_RISCV_HI20:\r
+      RiscVHi20Fixup = (UINT32 *) Fixup;\r
+      break;\r
+\r
+  case EFI_IMAGE_REL_BASED_RISCV_LOW12I:\r
+      if (RiscVHi20Fixup != NULL) {\r
+        Value = (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);\r
+        Value2 = (UINT32)(RV_X(*(UINT32 *)Fixup, 20, 12));\r
+        if (Value2 & (RISCV_IMM_REACH/2)) {\r
+          Value2 |= ~(RISCV_IMM_REACH-1);\r
+        }\r
+        Value += Value2;\r
+        Value += (UINT32)Adjust;\r
+        Value2 = RISCV_CONST_HIGH_PART (Value);\r
+        *(UINT32 *)RiscVHi20Fixup = (RV_X (Value2, 12, 20) << 12) | \\r
+                                           (RV_X (*(UINT32 *)RiscVHi20Fixup, 0, 12));\r
+        *(UINT32 *)Fixup = (RV_X (Value, 0, 12) << 20) | \\r
+                           (RV_X (*(UINT32 *)Fixup, 0, 20));\r
+      }\r
+      RiscVHi20Fixup = NULL;\r
+      break;\r
+\r
+  case EFI_IMAGE_REL_BASED_RISCV_LOW12S:\r
+      if (RiscVHi20Fixup != NULL) {\r
+        Value = (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);\r
+        Value2 = (UINT32)(RV_X(*(UINT32 *)Fixup, 7, 5) | (RV_X(*(UINT32 *)Fixup, 25, 7) << 5));\r
+        if (Value2 & (RISCV_IMM_REACH/2)) {\r
+          Value2 |= ~(RISCV_IMM_REACH-1);\r
+        }\r
+        Value += Value2;\r
+        Value += (UINT32)Adjust;\r
+        Value2 = RISCV_CONST_HIGH_PART (Value);\r
+        *(UINT32 *)RiscVHi20Fixup = (RV_X (Value2, 12, 20) << 12) | \\r
+                                           (RV_X (*(UINT32 *)RiscVHi20Fixup, 0, 12));\r
+        Value2 = *(UINT32 *)Fixup & 0x01fff07f;\r
+        Value &= RISCV_IMM_REACH - 1;\r
+        *(UINT32 *)Fixup = Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) | (RV_X(Value, 5, 7) << 25)));\r
+      }\r
+      RiscVHi20Fixup = NULL;\r
+      break;\r
+\r
+  default:\r
+      return EFI_UNSUPPORTED;\r
+\r
+  }\r
+  return RETURN_SUCCESS;\r
+}\r
 \r
 /**\r
   Pass in a pointer to an ARM MOVT or MOVW immediate instruction and\r