--- /dev/null
+/** @file\r
+ ACPI 1.0b definitions from the ACPI Specification, revision 1.0b\r
+\r
+ Copyright (c) 2006 - 2007 Intel Corporation. All rights reserved. \r
+\r
+ This program and the accompanying materials are licensed and made available\r
+ under the terms and conditions of the BSD License which accompanies this\r
+ distribution. The full text of the license may be found at:\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ File Name: Acpi1_0.h\r
+\r
+**/\r
+\r
+#ifndef _ACPI_1_0_H_\r
+#define _ACPI_1_0_H_\r
+\r
+#include "IndustryStandard/Acpi.h"\r
+\r
+//\r
+// Ensure proper structure formats\r
+//\r
+#pragma pack(1)\r
+//\r
+// ACPI 1.0b table structures\r
+//\r
+//\r
+// Root System Description Pointer Structure\r
+//\r
+typedef struct {\r
+ UINT64 Signature;\r
+ UINT8 Checksum;\r
+ UINT8 OemId[6];\r
+ UINT8 Reserved;\r
+ UINT32 RsdtAddress;\r
+} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
+\r
+//\r
+// Root System Description Table\r
+// No definition needed as it is a common description table header followed by a\r
+// variable number of UINT32 table pointers.\r
+//\r
+//\r
+// RSDT Revision (as defined in ACPI 1.0b spec.)\r
+//\r
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
+\r
+//\r
+// Fixed ACPI Description Table Structure (FADT)\r
+//\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 FirmwareCtrl;\r
+ UINT32 Dsdt;\r
+ UINT8 IntModel;\r
+ UINT8 Reserved1;\r
+ UINT16 SciInt;\r
+ UINT32 SmiCmd;\r
+ UINT8 AcpiEnable;\r
+ UINT8 AcpiDisable;\r
+ UINT8 S4BiosReq;\r
+ UINT8 Reserved2;\r
+ UINT32 Pm1aEvtBlk;\r
+ UINT32 Pm1bEvtBlk;\r
+ UINT32 Pm1aCntBlk;\r
+ UINT32 Pm1bCntBlk;\r
+ UINT32 Pm2CntBlk;\r
+ UINT32 PmTmrBlk;\r
+ UINT32 Gpe0Blk;\r
+ UINT32 Gpe1Blk;\r
+ UINT8 Pm1EvtLen;\r
+ UINT8 Pm1CntLen;\r
+ UINT8 Pm2CntLen;\r
+ UINT8 PmTmLen;\r
+ UINT8 Gpe0BlkLen;\r
+ UINT8 Gpe1BlkLen;\r
+ UINT8 Gpe1Base;\r
+ UINT8 Reserved3;\r
+ UINT16 PLvl2Lat;\r
+ UINT16 PLvl3Lat;\r
+ UINT16 FlushSize;\r
+ UINT16 FlushStride;\r
+ UINT8 DutyOffset;\r
+ UINT8 DutyWidth;\r
+ UINT8 DayAlrm;\r
+ UINT8 MonAlrm;\r
+ UINT8 Century;\r
+ UINT8 Reserved4;\r
+ UINT8 Reserved5;\r
+ UINT8 Reserved6;\r
+ UINT32 Flags;\r
+} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
+\r
+//\r
+// FADT Version (as defined in ACPI 1.0b spec.)\r
+//\r
+#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01\r
+\r
+//\r
+// Fixed ACPI Description Table Fixed Feature Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_1_0_WBINVD (1 << 0)\r
+#define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)\r
+#define EFI_ACPI_1_0_PROC_C1 (1 << 2)\r
+#define EFI_ACPI_1_0_P_LVL2_UP (1 << 3)\r
+#define EFI_ACPI_1_0_PWR_BUTTON (1 << 4)\r
+#define EFI_ACPI_1_0_SLP_BUTTON (1 << 5)\r
+#define EFI_ACPI_1_0_FIX_RTC (1 << 6)\r
+#define EFI_ACPI_1_0_RTC_S4 (1 << 7)\r
+#define EFI_ACPI_1_0_TMR_VAL_EXT (1 << 8)\r
+#define EFI_ACPI_1_0_DCK_CAP (1 << 9)\r
+\r
+//\r
+// Firmware ACPI Control Structure\r
+//\r
+typedef struct {\r
+ UINT32 Signature;\r
+ UINT32 Length;\r
+ UINT32 HardwareSignature;\r
+ UINT32 FirmwareWakingVector;\r
+ UINT32 GlobalLock;\r
+ UINT32 Flags;\r
+ UINT8 Reserved[40];\r
+} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
+\r
+//\r
+// Firmware Control Structure Feature Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_1_0_S4BIOS_F (1 << 0)\r
+\r
+//\r
+// Multiple APIC Description Table header definition. The rest of the table\r
+// must be defined in a platform specific manner.\r
+//\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 LocalApicAddress;\r
+ UINT32 Flags;\r
+} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
+\r
+//\r
+// MADT Revision (as defined in ACPI 1.0b spec.)\r
+//\r
+#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
+\r
+//\r
+// Multiple APIC Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_1_0_PCAT_COMPAT (1 << 0)\r
+\r
+//\r
+// Multiple APIC Description Table APIC structure types\r
+// All other values between 0x09 an 0xFF are reserved and\r
+// will be ignored by OSPM.\r
+//\r
+#define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00\r
+#define EFI_ACPI_1_0_IO_APIC 0x01\r
+#define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
+#define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
+#define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04\r
+\r
+//\r
+// APIC Structure Definitions\r
+//\r
+//\r
+// Processor Local APIC Structure Definition\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT8 ApicId;\r
+ UINT32 Flags;\r
+} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
+\r
+//\r
+// Local APIC Flags. All other bits are reserved and must be 0.\r
+//\r
+#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)\r
+\r
+//\r
+// IO APIC Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 IoApicId;\r
+ UINT8 Reserved;\r
+ UINT32 IoApicAddress;\r
+ UINT32 SystemVectorBase;\r
+} EFI_ACPI_1_0_IO_APIC_STRUCTURE;\r
+\r
+//\r
+// Interrupt Source Override Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 Bus;\r
+ UINT8 Source;\r
+ UINT32 GlobalSystemInterruptVector;\r
+ UINT16 Flags;\r
+} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
+\r
+//\r
+// Non-Maskable Interrupt Source Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Flags;\r
+ UINT32 GlobalSystemInterruptVector;\r
+} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
+\r
+//\r
+// Local APIC NMI Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT16 Flags;\r
+ UINT8 LocalApicInti;\r
+} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;\r
+\r
+//\r
+// Smart Battery Description Table (SBST)\r
+//\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 WarningEnergyLevel;\r
+ UINT32 LowEnergyLevel;\r
+ UINT32 CriticalEnergyLevel;\r
+} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
+\r
+//\r
+// Known table signatures\r
+//\r
+//\r
+// "RSD PTR " Root System Description Pointer\r
+//\r
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL\r
+\r
+//\r
+// "APIC" Multiple APIC Description Table\r
+//\r
+#define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041\r
+\r
+//\r
+// "DSDT" Differentiated System Description Table\r
+//\r
+#define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344\r
+\r
+//\r
+// "FACS" Firmware ACPI Control Structure\r
+//\r
+#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146\r
+\r
+//\r
+// "FACP" Fixed ACPI Description Table\r
+//\r
+#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r
+\r
+//\r
+// "PSDT" Persistent System Description Table\r
+//\r
+#define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350\r
+\r
+//\r
+// "RSDT" Root System Description Table\r
+//\r
+#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352\r
+\r
+//\r
+// "SBST" Smart Battery Specification Table\r
+//\r
+#define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253\r
+\r
+//\r
+// "SSDT" Secondary System Description Table\r
+//\r
+#define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r
+\r
+#pragma pack()\r
+\r
+#endif\r
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