--- /dev/null
+/** @file\r
+ ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
+\r
+ Copyright (c) 2006 - 2007 Intel Corporation. All rights reserved. \r
+\r
+ This program and the accompanying materials are licensed and made available\r
+ under the terms and conditions of the BSD License which accompanies this\r
+ distribution. The full text of the license may be found at:\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ File Name: Acpi2_0.h\r
+\r
+**/\r
+\r
+#ifndef _ACPI_2_0_H_\r
+#define _ACPI_2_0_H_\r
+\r
+#include "IndustryStandard/Acpi.h"\r
+\r
+//\r
+// Ensure proper structure formats\r
+//\r
+#pragma pack(1)\r
+//\r
+// ACPI Specification Revision\r
+//\r
+#define EFI_ACPI_2_0_REVISION 0x02\r
+\r
+//\r
+// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub\r
+// and produced by a platform specific driver.\r
+//\r
+//\r
+// ACPI OEM ID\r
+//\r
+#define EFI_ACPI_2_0_OEM_ID "INTEL "\r
+#define EFI_ACPI_2_0_OEM_TABLE_ID 0x5034303738543245 // "E2T8704P"\r
+//\r
+// ACPI OEM Revision\r
+//\r
+#define EFI_ACPI_2_0_OEM_REVISION 0x00000002\r
+\r
+//\r
+// ACPI table creator ID\r
+//\r
+#define EFI_ACPI_2_0_CREATOR_ID 0x5446534D // TBD "MSFT"\r
+//\r
+// ACPI table creator revision\r
+//\r
+#define EFI_ACPI_2_0_CREATOR_REVISION 0x01000013 // TBD\r
+//\r
+// ACPI 2.0 Generic Address Space definition\r
+//\r
+typedef struct {\r
+ UINT8 AddressSpaceId;\r
+ UINT8 RegisterBitWidth;\r
+ UINT8 RegisterBitOffset;\r
+ UINT8 Reserved;\r
+ UINT64 Address;\r
+} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
+\r
+//\r
+// Generic Address Space Address IDs\r
+//\r
+#define EFI_ACPI_2_0_SYSTEM_MEMORY 0\r
+#define EFI_ACPI_2_0_SYSTEM_IO 1\r
+#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2\r
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3\r
+#define EFI_ACPI_2_0_SMBUS 4\r
+#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
+\r
+//\r
+// ACPI 2.0 table structures\r
+//\r
+//\r
+// Root System Description Pointer Structure\r
+//\r
+typedef struct {\r
+ UINT64 Signature;\r
+ UINT8 Checksum;\r
+ UINT8 OemId[6];\r
+ UINT8 Revision;\r
+ UINT32 RsdtAddress;\r
+ UINT32 Length;\r
+ UINT64 XsdtAddress;\r
+ UINT8 ExtendedChecksum;\r
+ UINT8 Reserved[3];\r
+} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
+\r
+//\r
+// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
+\r
+//\r
+// Common table header, this prefaces all ACPI tables, including FACS, but\r
+// excluding the RSD PTR structure\r
+//\r
+typedef struct {\r
+ UINT32 Signature;\r
+ UINT32 Length;\r
+} EFI_ACPI_2_0_COMMON_HEADER;\r
+\r
+//\r
+// Root System Description Table\r
+// No definition needed as it is a common description table header followed by a\r
+// variable number of UINT32 table pointers.\r
+//\r
+//\r
+// RSDT Revision (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
+\r
+//\r
+// Extended System Description Table\r
+// No definition needed as it is a common description table header followed by a\r
+// variable number of UINT64 table pointers.\r
+//\r
+//\r
+// XSDT Revision (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
+\r
+//\r
+// Fixed ACPI Description Table Structure (FADT)\r
+//\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 FirmwareCtrl;\r
+ UINT32 Dsdt;\r
+ UINT8 Reserved0;\r
+ UINT8 PreferredPmProfile;\r
+ UINT16 SciInt;\r
+ UINT32 SmiCmd;\r
+ UINT8 AcpiEnable;\r
+ UINT8 AcpiDisable;\r
+ UINT8 S4BiosReq;\r
+ UINT8 PstateCnt;\r
+ UINT32 Pm1aEvtBlk;\r
+ UINT32 Pm1bEvtBlk;\r
+ UINT32 Pm1aCntBlk;\r
+ UINT32 Pm1bCntBlk;\r
+ UINT32 Pm2CntBlk;\r
+ UINT32 PmTmrBlk;\r
+ UINT32 Gpe0Blk;\r
+ UINT32 Gpe1Blk;\r
+ UINT8 Pm1EvtLen;\r
+ UINT8 Pm1CntLen;\r
+ UINT8 Pm2CntLen;\r
+ UINT8 PmTmrLen;\r
+ UINT8 Gpe0BlkLen;\r
+ UINT8 Gpe1BlkLen;\r
+ UINT8 Gpe1Base;\r
+ UINT8 CstCnt;\r
+ UINT16 PLvl2Lat;\r
+ UINT16 PLvl3Lat;\r
+ UINT16 FlushSize;\r
+ UINT16 FlushStride;\r
+ UINT8 DutyOffset;\r
+ UINT8 DutyWidth;\r
+ UINT8 DayAlrm;\r
+ UINT8 MonAlrm;\r
+ UINT8 Century;\r
+ UINT16 IaPcBootArch;\r
+ UINT8 Reserved1;\r
+ UINT32 Flags;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
+ UINT8 ResetValue;\r
+ UINT8 Reserved2[3];\r
+ UINT64 XFirmwareCtrl;\r
+ UINT64 XDsdt;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
+} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
+\r
+//\r
+// FADT Version (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r
+\r
+//\r
+// Fixed ACPI Description Table Boot Architecture Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
+#define EFI_ACPI_2_0_8042 (1 << 1)\r
+\r
+//\r
+// Fixed ACPI Description Table Fixed Feature Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_2_0_WBINVD (1 << 0)\r
+#define EFI_ACPI_2_0_WBINVD_FLUSH (1 << 1)\r
+#define EFI_ACPI_2_0_PROC_C1 (1 << 2)\r
+#define EFI_ACPI_2_0_P_LVL2_UP (1 << 3)\r
+#define EFI_ACPI_2_0_PWR_BUTTON (1 << 4)\r
+#define EFI_ACPI_2_0_SLP_BUTTON (1 << 5)\r
+#define EFI_ACPI_2_0_FIX_RTC (1 << 6)\r
+#define EFI_ACPI_2_0_RTC_S4 (1 << 7)\r
+#define EFI_ACPI_2_0_TMR_VAL_EXT (1 << 8)\r
+#define EFI_ACPI_2_0_DCK_CAP (1 << 9)\r
+#define EFI_ACPI_2_0_RESET_REG_SUP (1 << 10)\r
+#define EFI_ACPI_2_0_SEALED_CASE (1 << 11)\r
+#define EFI_ACPI_2_0_HEADLESS (1 << 12)\r
+#define EFI_ACPI_2_0_CPU_SW_SLP (1 << 13)\r
+\r
+//\r
+// Firmware ACPI Control Structure\r
+//\r
+typedef struct {\r
+ UINT32 Signature;\r
+ UINT32 Length;\r
+ UINT32 HardwareSignature;\r
+ UINT32 FirmwareWakingVector;\r
+ UINT32 GlobalLock;\r
+ UINT32 Flags;\r
+ UINT64 XFirmwareWakingVector;\r
+ UINT8 Version;\r
+ UINT8 Reserved[31];\r
+} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
+\r
+//\r
+// FACS Version (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01\r
+\r
+//\r
+// Firmware Control Structure Feature Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
+\r
+//\r
+// Multiple APIC Description Table header definition. The rest of the table\r
+// must be defined in a platform specific manner.\r
+//\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 LocalApicAddress;\r
+ UINT32 Flags;\r
+} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
+\r
+//\r
+// MADT Revision (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
+\r
+//\r
+// Multiple APIC Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_2_0_PCAT_COMPAT (1 << 0)\r
+\r
+//\r
+// Multiple APIC Description Table APIC structure types\r
+// All other values between 0x09 an 0xFF are reserved and\r
+// will be ignored by OSPM.\r
+//\r
+#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00\r
+#define EFI_ACPI_2_0_IO_APIC 0x01\r
+#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
+#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
+#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04\r
+#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
+#define EFI_ACPI_2_0_IO_SAPIC 0x06\r
+#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07\r
+#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
+\r
+//\r
+// APIC Structure Definitions\r
+//\r
+//\r
+// Processor Local APIC Structure Definition\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT8 ApicId;\r
+ UINT32 Flags;\r
+} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
+\r
+//\r
+// Local APIC Flags. All other bits are reserved and must be 0.\r
+//\r
+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
+\r
+//\r
+// IO APIC Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 IoApicId;\r
+ UINT8 Reserved;\r
+ UINT32 IoApicAddress;\r
+ UINT32 GlobalSystemInterruptBase;\r
+} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
+\r
+//\r
+// Interrupt Source Override Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 Bus;\r
+ UINT8 Source;\r
+ UINT32 GlobalSystemInterrupt;\r
+ UINT16 Flags;\r
+} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
+\r
+//\r
+// Non-Maskable Interrupt Source Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Flags;\r
+ UINT32 GlobalSystemInterrupt;\r
+} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
+\r
+//\r
+// Local APIC NMI Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT16 Flags;\r
+ UINT8 LocalApicLint;\r
+} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
+\r
+//\r
+// Local APIC Address Override Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Reserved;\r
+ UINT64 LocalApicAddress;\r
+} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
+\r
+//\r
+// IO SAPIC Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 IoApicId;\r
+ UINT8 Reserved;\r
+ UINT32 GlobalSystemInterruptBase;\r
+ UINT64 IoSapicAddress;\r
+} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
+\r
+//\r
+// Local SAPIC Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT8 LocalSapicId;\r
+ UINT8 LocalSapicEid;\r
+ UINT8 Reserved[3];\r
+ UINT32 Flags;\r
+} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
+\r
+//\r
+// Platform Interrupt Sources Structure\r
+//\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Flags;\r
+ UINT8 InterruptType;\r
+ UINT8 ProcessorId;\r
+ UINT8 ProcessorEid;\r
+ UINT8 IoSapicVector;\r
+ UINT32 GlobalSystemInterrupt;\r
+ UINT32 Reserved;\r
+} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
+\r
+//\r
+// Smart Battery Description Table (SBST)\r
+//\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 WarningEnergyLevel;\r
+ UINT32 LowEnergyLevel;\r
+ UINT32 CriticalEnergyLevel;\r
+} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
+\r
+//\r
+// SBST Version (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
+\r
+//\r
+// Embedded Controller Boot Resources Table (ECDT)\r
+// The table is followed by a null terminated ASCII string that contains\r
+// a fully qualified reference to the name space object.\r
+//\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
+ UINT32 Uid;\r
+ UINT8 GpeBit;\r
+} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
+\r
+//\r
+// ECDT Version (as defined in ACPI 2.0 spec.)\r
+//\r
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
+\r
+//\r
+// Known table signatures\r
+//\r
+//\r
+// "RSD PTR " Root System Description Pointer\r
+//\r
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352\r
+\r
+//\r
+// "SPIC" Multiple SAPIC Description Table\r
+//\r
+// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
+// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
+//\r
+#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
+\r
+//\r
+// "BOOT" MS Simple Boot Spec\r
+//\r
+#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42\r
+\r
+//\r
+// "DBGP" MS Bebug Port Spec\r
+//\r
+#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244\r
+\r
+//\r
+// "DSDT" Differentiated System Description Table\r
+//\r
+#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344\r
+\r
+//\r
+// "ECDT" Embedded Controller Boot Resources Table\r
+//\r
+#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345\r
+\r
+//\r
+// "ETDT" Event Timer Description Table\r
+//\r
+#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445\r
+\r
+//\r
+// "FACS" Firmware ACPI Control Structure\r
+//\r
+#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146\r
+\r
+//\r
+// "FACP" Fixed ACPI Description Table\r
+//\r
+#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r
+\r
+//\r
+// "APIC" Multiple APIC Description Table\r
+//\r
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
+\r
+//\r
+// "PSDT" Persistent System Description Table\r
+//\r
+#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350\r
+\r
+//\r
+// "RSDT" Root System Description Table\r
+//\r
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352\r
+\r
+//\r
+// "SBST" Smart Battery Specification Table\r
+//\r
+#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253\r
+\r
+//\r
+// "SLIT" System Locality Information Table\r
+//\r
+#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53\r
+\r
+//\r
+// "SPCR" Serial Port Concole Redirection Table\r
+//\r
+#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053\r
+\r
+//\r
+// "SRAT" Static Resource Affinity Table\r
+//\r
+#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253\r
+\r
+//\r
+// "SSDT" Secondary System Description Table\r
+//\r
+#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r
+\r
+//\r
+// "SPMI" Server Platform Management Interface Table\r
+//\r
+#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053\r
+\r
+//\r
+// "XSDT" Extended System Description Table\r
+//\r
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358\r
+\r
+#pragma pack()\r
+\r
+#endif\r
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