BeagleBoardPkg: create private PrePi implementation

[mirror_edk2.git] / BeagleBoardPkg / PrePi / Arm / ModuleEntryPoint.S

diff --git a/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.S b/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.S
new file mode 100644 (file)
index 0000000..212cab6
--- /dev/null
+++ b/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.S
@@ -0,0 +1,130 @@
+//\r
+//  Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
+//\r
+//  This program and the accompanying materials\r
+//  are licensed and made available under the terms and conditions of the BSD License\r
+//  which accompanies this distribution.  The full text of the license may be found at\r
+//  http://opensource.org/licenses/bsd-license.php\r
+//\r
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+\r
+#include <Chipset/ArmV7.h>\r
+\r
+ASM_FUNC(_ModuleEntryPoint)\r
+  // Do early platform specific actions\r
+  bl    ASM_PFX(ArmPlatformPeiBootAction)\r
+\r
+  // Get ID of this CPU in Multicore system\r
+  bl    ASM_PFX(ArmReadMpidr)\r
+  // Keep a copy of the MpId register value\r
+  mov   r8, r0\r
+\r
+_SetSVCMode:\r
+  // Enter SVC mode, Disable FIQ and IRQ\r
+  mov     r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)\r
+  msr     CPSR_c, r1\r
+\r
+// Check if we can install the stack at the top of the System Memory or if we need\r
+// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
+// at the top of the DRAM)\r
+_SystemMemoryEndInit:\r
+  ADRL  (r1, mSystemMemoryEnd)\r
+  ldrd  r2, r3, [r1]\r
+  teq   r3, #0\r
+  moveq r1, r2\r
+  mvnne r1, #0\r
+\r
+_SetupStackPosition:\r
+  // r1 = SystemMemoryTop\r
+\r
+  // Calculate Top of the Firmware Device\r
+  MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))\r
+  MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)\r
+  add   r3, r3, r2      // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
+\r
+  // UEFI Memory Size (stacks are allocated in this region)\r
+  MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))\r
+\r
+  //\r
+  // Reserve the memory for the UEFI region (contain stacks on its top)\r
+  //\r
+\r
+  // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
+  subs  r0, r1, r3      // r0 = SystemMemoryTop - FdTop\r
+  bmi   _SetupStack     // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
+  cmp   r0, r4\r
+  bge   _SetupStack\r
+\r
+  // Case the top of stacks is the FdBaseAddress\r
+  mov   r1, r2\r
+\r
+_SetupStack:\r
+  // r1 contains the top of the stack (and the UEFI Memory)\r
+\r
+  // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
+  // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
+  // top of the memory space)\r
+  adds  r9, r1, #1\r
+  bcs   _SetupOverflowStack\r
+\r
+_SetupAlignedStack:\r
+  mov   r1, r9\r
+  b     _GetBaseUefiMemory\r
+\r
+_SetupOverflowStack:\r
+  // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
+  // aligned (4KB)\r
+  MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)\r
+  and   r1, r1, r9\r
+\r
+_GetBaseUefiMemory:\r
+  // Calculate the Base of the UEFI Memory\r
+  sub   r9, r1, r4\r
+\r
+_GetStackBase:\r
+  // r1 = The top of the Mpcore Stacks\r
+  // Stack for the primary core = PrimaryCoreStack\r
+  MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
+  sub   r10, r1, r2\r
+\r
+  // Stack for the secondary core = Number of Cores - 1\r
+  MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
+  sub   r10, r10, r1\r
+\r
+  // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+  mov   r0, r10\r
+  mov   r1, r8\r
+  //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
+  MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
+  MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
+  bl    ASM_PFX(ArmPlatformStackSet)\r
+\r
+  // Is it the Primary Core ?\r
+  mov   r0, r8\r
+  bl    ASM_PFX(ArmPlatformIsPrimaryCore)\r
+  cmp   r0, #1\r
+  bne   _PrepareArguments\r
+\r
+_PrepareArguments:\r
+  mov   r0, r8\r
+  mov   r1, r9\r
+  mov   r2, r10\r
+  mov   r3, sp\r
+\r
+  // Move sec startup address into a data register\r
+  // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
+  ldr   r4, =ASM_PFX(CEntryPoint)\r
+\r
+  // Jump to PrePiCore C code\r
+  //    r0 = MpId\r
+  //    r1 = UefiMemoryBase\r
+  //    r2 = StacksBase\r
+  blx   r4\r
+\r
+_NeverReturn:\r
+  b _NeverReturn\r