Adding support for BeagleBoard.

[mirror_edk2.git] / BeagleBoardPkg / Sec / Clock.c

diff --git a/BeagleBoardPkg/Sec/Clock.c b/BeagleBoardPkg/Sec/Clock.c
new file mode 100644 (file)
index 0000000..2d814e4
--- /dev/null
+++ b/BeagleBoardPkg/Sec/Clock.c
@@ -0,0 +1,70 @@
+/** @file\r
+\r
+  Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
+  \r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Library/IoLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#include <Omap3530/Omap3530.h>\r
+\r
+VOID\r
+ClockInit (\r
+  VOID\r
+  )\r
+{\r
+  //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.\r
+\r
+  // Enable PLL5 and set to 120 MHz as a reference clock.\r
+  MmioWrite32(CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));\r
+  MmioWrite32(CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));\r
+  MmioWrite32(CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);\r
+\r
+  // Turn on functional & interface clocks to the USBHOST power domain\r
+  MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE\r
+                              | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);\r
+  MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);\r
+\r
+  // Turn on functional & interface clocks to the USBTLL block.\r
+  MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);\r
+  MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);\r
+\r
+  // Turn on functional & interface clocks to MMC1 and I2C1 modules.\r
+  MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE\r
+                            | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);\r
+  MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE\r
+                            | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);\r
+\r
+  // Turn on functional & interface clocks to various Peripherals.\r
+  MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE\r
+                          | CM_FCLKEN_PER_EN_GPT3_ENABLE\r
+                          | CM_FCLKEN_PER_EN_GPT4_ENABLE\r
+                          | CM_FCLKEN_PER_EN_GPIO2_ENABLE\r
+                          | CM_FCLKEN_PER_EN_GPIO3_ENABLE\r
+                          | CM_FCLKEN_PER_EN_GPIO4_ENABLE\r
+                          | CM_FCLKEN_PER_EN_GPIO5_ENABLE\r
+                          | CM_FCLKEN_PER_EN_GPIO6_ENABLE);\r
+  MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE\r
+                          | CM_ICLKEN_PER_EN_GPT3_ENABLE\r
+                          | CM_ICLKEN_PER_EN_GPT4_ENABLE\r
+                          | CM_ICLKEN_PER_EN_GPIO2_ENABLE\r
+                          | CM_ICLKEN_PER_EN_GPIO3_ENABLE\r
+                          | CM_ICLKEN_PER_EN_GPIO4_ENABLE\r
+                          | CM_ICLKEN_PER_EN_GPIO5_ENABLE\r
+                          | CM_ICLKEN_PER_EN_GPIO6_ENABLE);\r
+\r
+  // Turn on functional & inteface clocks to various wakeup modules.\r
+  MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE\r
+                           | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);\r
+  MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE\r
+                           | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);\r
+}\r