Resolved several warnings generated by GCC.

[mirror_edk2.git] / DuetPkg / PciRootBridgeNoEnumerationDxe / PcatPciRootBridge.c

diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
index ff53bb5c78bf1c63f1b06863374442f7d6dd5c36..c5895d98d83d96a7fe7c46c6ecd03874cb06de73 100644 (file)
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
@@ -1,6 +1,6 @@
 /*++\r
 \r
-Copyright (c) 2005 - 2006, Intel Corporation                                                         \r
+Copyright (c) 2005 - 2008, Intel Corporation                                                         \r
 All rights reserved. This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -62,7 +62,7 @@ Returns:
   //\r
   // Initialize gCpuIo now since the chipset init code requires it.\r
   //\r
-  Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &gCpuIo);\r
+  Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **)&gCpuIo);\r
   ASSERT_EFI_ERROR (Status);\r
 \r
   //\r
@@ -79,7 +79,7 @@ Returns:
     Status = gBS->AllocatePool(\r
                     EfiBootServicesData,\r
                     sizeof (PCAT_PCI_ROOT_BRIDGE_INSTANCE),\r
-                    &PrivateData\r
+                    (VOID **)&PrivateData\r
                     );\r
     if (EFI_ERROR (Status)) {\r
       goto Done;\r
@@ -104,10 +104,10 @@ Returns:
 \r
     PrivateData->IoBase      = 0xffffffff;\r
     PrivateData->MemBase     = 0xffffffff;\r
-    PrivateData->Mem32Base   = 0xffffffffffffffff;\r
-    PrivateData->Pmem32Base  = 0xffffffffffffffff;\r
-    PrivateData->Mem64Base   = 0xffffffffffffffff;\r
-    PrivateData->Pmem64Base  = 0xffffffffffffffff;\r
+    PrivateData->Mem32Base   = 0xffffffffffffffffULL;\r
+    PrivateData->Pmem32Base  = 0xffffffffffffffffULL;\r
+    PrivateData->Mem64Base   = 0xffffffffffffffffULL;\r
+    PrivateData->Pmem64Base  = 0xffffffffffffffffULL;\r
 \r
     //\r
     // The default mechanism for performing PCI Configuration cycles is to \r
@@ -217,6 +217,7 @@ Returns:
           break;\r
         }\r
 \r
+\r
         //\r
         // Increment the number of PCI device found on the primary bus of the PCI root bridge\r
         //\r
@@ -592,7 +593,7 @@ Returns:
     Status = gBS->AllocatePool (\r
                     EfiBootServicesData, \r
                     sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR),\r
-                    &PrivateData->Configuration\r
+                    (VOID **)&PrivateData->Configuration\r
                     );\r
     if (EFI_ERROR (Status )) {\r
       return Status;\r
@@ -621,7 +622,7 @@ Returns:
   Status = gBS->AllocatePool (\r
                   EfiBootServicesData, \r
                   sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * NumConfig + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR),\r
-                  &PrivateData->Configuration\r
+                  (VOID **)&PrivateData->Configuration\r
                   );\r
   if (EFI_ERROR (Status )) {\r
     return Status;\r
@@ -974,24 +975,14 @@ Returns:
   UINTN                                    BufferSize;\r
   UINT32                                   Index;\r
   UINT32                                   Number;\r
-  VOID                                     *HobList;\r
-  EFI_STATUS                               Status;\r
   EFI_PEI_HOB_POINTERS                     GuidHob;\r
 \r
-  //\r
-  // Get Hob List from configuration table\r
-  //\r
-  Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, &HobList);\r
-  if (EFI_ERROR (Status)) {\r
-    return 0;\r
-  }\r
-\r
   //\r
   // Get PciExpressAddressInfo Hob\r
   //\r
   PciExpressBaseAddressInfo = NULL;\r
   BufferSize                = 0;\r
-  GuidHob.Raw = GetNextGuidHob (&gEfiPciExpressBaseAddressGuid, &HobList);\r
+  GuidHob.Raw = GetFirstGuidHob (&gEfiPciExpressBaseAddressGuid);\r
   if (GuidHob.Raw != NULL) {\r
     PciExpressBaseAddressInfo = GET_GUID_HOB_DATA (GuidHob.Guid);\r
     BufferSize                = GET_GUID_HOB_DATA_SIZE (GuidHob.Guid);\r