Add in the 1st version of ECP.

[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Include / Ipf / PalApi.h

diff --git a/EdkCompatibilityPkg/Foundation/Include/Ipf/PalApi.h b/EdkCompatibilityPkg/Foundation/Include/Ipf/PalApi.h
new file mode 100644 (file)
index 0000000..aaa6a64
--- /dev/null
+++ b/EdkCompatibilityPkg/Foundation/Include/Ipf/PalApi.h
@@ -0,0 +1,133 @@
+/*++\r
+\r
+Copyright (c) 2004, Intel Corporation                                                         \r
+All rights reserved. This program and the accompanying materials                          \r
+are licensed and made available under the terms and conditions of the BSD License         \r
+which accompanies this distribution.  The full text of the license may be found at        \r
+http://opensource.org/licenses/bsd-license.php                                            \r
+                                                                                          \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+\r
+Module Name:\r
+\r
+  PalApi.h\r
+\r
+Abstract:\r
+\r
+  Main PAL API's defined in PAL specification. \r
+\r
+\r
+Revision History:\r
+\r
+--*/\r
+\r
+#ifndef _PALPROC_H\r
+#define _PALPROC_H\r
+\r
+#include "Tiano.h"\r
+\r
+#define PAL_CACHE_FLUSH       0x0001\r
+#define PAL_CACHE_INFO        0x0002\r
+#define PAL_CACHE_INIT        0x0003\r
+#define PAL_CACHE_SUMMARY     0x0004\r
+#define PAL_MEM_ATTRIB        0x0005\r
+#define PAL_PTCE_INFO         0x0006\r
+#define PAL_VM_INFO           0x0007\r
+#define PAL_VM_SUMMARY        0x0008\r
+#define PAL_BUS_GET_FEATURES  0x0009\r
+#define PAL_BUS_SET_FEATURES  0x000a\r
+#define PAL_DEBUG_INFO        0x000b\r
+#define PAL_FIXED_ADDR        0x000c\r
+#define PAL_FREQ_BASE         0x000d\r
+#define PAL_FREQ_RATIOS       0x000e\r
+#define PAL_PERF_MON_INFO     0x000f\r
+#define PAL_PLATFORM_ADDR     0x0010\r
+#define PAL_PROC_GET_FEATURES 0x0011\r
+#define PAL_PROC_SET_FEATURES 0x0012\r
+#define PAL_RSE_INFO          0x0013\r
+#define PAL_VERSION           0x0014\r
+\r
+#define PAL_MC_CLEAR_LOG      0x0015\r
+#define PAL_MC_DRAIN          0x0016\r
+#define PAL_MC_EXPECTED       0x0017\r
+#define PAL_MC_DYNAMIC_STATE  0x0018\r
+#define PAL_MC_ERROR_INFO     0x0019\r
+#define PAL_MC_RESUME         0x001a\r
+#define PAL_MC_REGISTER_MEM   0x001b\r
+#define PAL_HALT              0x001c\r
+#define PAL_HALT_LIGHT        0x001d\r
+#define PAL_COPY_INFO         0x001e\r
+#define PAL_SHUTDOWN          0x002c\r
+#define PAL_AUTH              0x0209\r
+#define PAL_SINGL_DISPERSAL   0x0226  // dec. 550\r
+#define PAL_HALT_INFO         0x0101\r
+#define PAL_CACHE_LINE_INIT   0x001f\r
+#define PAL_PMI_ENTRYPOINT    0x0020\r
+#define PAL_ENTER_IA_32_ENV   0x0021\r
+#define PAL_VM_PAGE_SIZE      0x0022\r
+#define PAL_MEM_FOR_TEST      0x0025\r
+#define PAL_CACHE_PROT_INFO   0x0026\r
+\r
+#define PAL_COPY_PAL          0x0100\r
+#define PAL_CACHE_READ        0x0103\r
+#define PAL_CACHE_WRITE       0x0104\r
+#define PAL_TEST_PROC         0x0102\r
+\r
+#define PAL_DEBUG_FEATURE     0x0063  // vp1\r
+typedef UINT64  EFI_PAL_STATUS;\r
+\r
+//\r
+//  Return values from PAL\r
+//\r
+typedef struct {\r
+  EFI_PAL_STATUS  Status; // register r8\r
+  UINT64          r9;\r
+  UINT64          r10;\r
+  UINT64          r11;\r
+} PAL_RETURN_REGS;\r
+\r
+//\r
+// PAL equates for other parameters.\r
+//\r
+#define PAL_SUCCESS             0x0\r
+#define PAL_CALL_ERROR          0xfffffffffffffffd\r
+#define PAL_CALL_UNIMPLEMENTED  0xffffffffffffffff\r
+#define PAL_CACHE_TYPE_I        0x1\r
+#define PAL_CACHE_TYPE_D        0x2\r
+#define PAL_CACHE_TYPE_I_AND_D  0x3\r
+#define PAL_CACHE_NO_INT        0x0\r
+#define PAL_CACHE_INT           0x2\r
+//\r
+// #define PAL_CACHE_PLAT_ACK                              0x4\r
+//\r
+#define PAL_CACHE_NO_PLAT_ACK               0x0\r
+#define PAL_CACHE_INVALIDATE                0x1\r
+#define PAL_CACHE_NO_INVALIDATE             0x0\r
+#define PAL_CACHE_ALL_LEVELS                - 0x1\r
+\r
+#define PAL_FEATURE_ENABLE                  0x1\r
+#define PAL_ENABLE_BERR_BIT                 63\r
+#define PAL_ENABLE_MCA_BINIT_BIT            61\r
+#define PAL_ENABLE_CMCI_MCA_BIT             60\r
+#define PAL_CACHE_DISABLE_BIT               59\r
+#define PAL_DISABLE_COHERENCY_BIT           58\r
+\r
+#define PAL_DIS_BUS_DATA_ERR_CHECK_BIT      63\r
+#define PAL_DIS_BUS_ADDR_ERR_CHECK_BIT      61\r
+#define PAL_DIS_BUS_INIT_EVENT_SIGNAL_BIT   60\r
+#define PAL_DIS_BUS_REQ_ERR_SIGNAL_BIT      58\r
+#define PAL_DIS_BUS_REQ_INT_ERR_SIGNAL_BIT  57\r
+#define PAL_DIS_BUS_REQ_ERR_CHECK_BIT       56\r
+#define PAL_DIS_BUS_RESP_ERR_CHECK_BIT      55\r
+\r
+#define PAL_COPY_BSP_TOKEN                  0x0\r
+#define PAL_COPY_AP_TOKEN                   0x1\r
+\r
+#define PAL_CODE_TOKEN                      0x0\r
+#define PAL_IA32EMU_CODE_TOKEN              0x1\r
+\r
+#define PAL_INTERRUPT_BLOCK_TOKEN           0x0\r
+#define PAL_IO_BLOCK_TOKEN                  0x1\r
+\r
+#endif\r