1. Add NULL QH to set as QH header;

[mirror_edk2.git] / EdkModulePkg / Bus / Pci / Ehci / Dxe / EhciReg.c

diff --git a/EdkModulePkg/Bus/Pci/Ehci/Dxe/EhciReg.c b/EdkModulePkg/Bus/Pci/Ehci/Dxe/EhciReg.c
index d5271c25b27b748930379d2b9d437e270a298437..78bca3b767d238c163ca26770e7f73b9821cd260 100644 (file)
--- a/EdkModulePkg/Bus/Pci/Ehci/Dxe/EhciReg.c
+++ b/EdkModulePkg/Bus/Pci/Ehci/Dxe/EhciReg.c
@@ -1,20 +1,20 @@
 /*++\r
 \r
-Copyright (c) 2006, Intel Corporation                                                     \r
-All rights reserved. This program and the accompanying materials                          \r
-are licensed and made available under the terms and conditions of the BSD License         \r
-which accompanies this distribution.  The full text of the license may be found at        \r
-http://opensource.org/licenses/bsd-license.php                                            \r
-                                                                                          \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+Copyright (c) 2006, Intel Corporation\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 Module Name:\r
 \r
     Ehchlp.c\r
-    \r
-Abstract: \r
-    \r
+\r
+Abstract:\r
+\r
 \r
 Revision History\r
 --*/\r
@@ -29,7 +29,7 @@ HostReset (
 {\r
   UINT32  Value;\r
   UINT32  TimeOut;\r
- \r
+\r
   ReadEhcOperationalReg (\r
     HcDev,\r
     USBCMD,\r
@@ -102,18 +102,18 @@ ReadEhcCapabiltiyReg (
 Routine Description:\r
 \r
   Read  Ehc Capabitlity register\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev              - USB2_HC_DEV \r
+  HcDev              - USB2_HC_DEV\r
   CapabiltiyRegAddr  - Ehc Capability register address\r
   Data               - A pointer to data read from register\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS        Success\r
   EFI_DEVICE_ERROR   Fail\r
-    \r
+\r
 --*/\r
 {\r
   return HcDev->PciIo->Mem.Read (\r
@@ -137,18 +137,18 @@ ReadEhcOperationalReg (
 Routine Description:\r
 \r
   Read  Ehc Operation register\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev                - USB2_HC_DEV \r
+  HcDev                - USB2_HC_DEV\r
   OperationalRegAddr   - Ehc Operation register address\r
   Data                 - A pointer to data read from register\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS        Success\r
   EFI_DEVICE_ERROR   Fail\r
-    \r
+\r
 --*/\r
 {\r
   ASSERT (HcDev->UsbCapabilityLen);\r
@@ -173,18 +173,18 @@ WriteEhcOperationalReg (
 Routine Description:\r
 \r
   Write  Ehc Operation register\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev                - USB2_HC_DEV \r
+  HcDev                - USB2_HC_DEV\r
   OperationalRegAddr   - Ehc Operation register address\r
   Data                 - 32bit write to register\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS        Success\r
   EFI_DEVICE_ERROR   Fail\r
-  \r
+\r
 --*/\r
 {\r
   ASSERT (HcDev->UsbCapabilityLen);\r
@@ -198,6 +198,8 @@ Returns:
                              );\r
 }\r
 \r
+\r
+\r
 VOID\r
 ClearLegacySupport (\r
   IN USB2_HC_DEV     *HcDev\r
@@ -239,7 +241,7 @@ Returns:
                      EfiPciIoWidthUint32,\r
                      EECP,\r
                      1,\r
-                     &Value \r
+                     &Value\r
                      );\r
 \r
   DEBUG((gEHCDebugLevel, "EECP[0] = 0x%x\n", Value));\r
@@ -249,7 +251,7 @@ Returns:
                      EfiPciIoWidthUint32,\r
                      EECP + 0x4,\r
                      1,\r
-                     &Value \r
+                     &Value\r
                      );\r
 \r
   DEBUG((gEHCDebugLevel, "EECP[4] = 0x%x\n", Value));\r
@@ -259,7 +261,7 @@ Returns:
                      EfiPciIoWidthUint32,\r
                      EECP,\r
                      1,\r
-                     &Value \r
+                     &Value\r
                      );\r
 \r
   Value = Value | (0x1 << 24);\r
@@ -270,7 +272,7 @@ Returns:
                      EfiPciIoWidthUint32,\r
                      EECP,\r
                      1,\r
-                     &Value \r
+                     &Value\r
                      );\r
 \r
  TimeOut = 40;\r
@@ -282,7 +284,7 @@ Returns:
                       EfiPciIoWidthUint32,\r
                       EECP,\r
                       1,\r
-                      &Value \r
+                      &Value\r
                       );\r
   if ((Value & 0x01010000) == 0x01000000) {\r
     break;\r
@@ -291,8 +293,8 @@ Returns:
 \r
   if (TimeOut == 0) {\r
     DEBUG((gEHCErrorLevel, "Timeout for getting HC OS Owned Semaphore\n" ));\r
-  } \r
-  \r
+  }\r
+\r
   DEBUG((gEHCErrorLevel, "After Release Value\n" ));\r
 \r
   HcDev->PciIo->Pci.Read (\r
@@ -300,7 +302,7 @@ Returns:
                      EfiPciIoWidthUint32,\r
                      EECP,\r
                      1,\r
-                     &Value \r
+                     &Value\r
                      );\r
 \r
   DEBUG((gEHCDebugLevel, "EECP[0] = 0x%x\n", Value));\r
@@ -310,7 +312,7 @@ Returns:
                      EfiPciIoWidthUint32,\r
                      EECP + 0x4,\r
                      1,\r
-                     &Value \r
+                     &Value\r
                      );\r
 \r
   DEBUG((gEHCDebugLevel, "EECP[4] = 0x%x\n", Value));\r
@@ -327,16 +329,16 @@ GetCapabilityLen (
 Routine Description:\r
 \r
   Get the length of capability register\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-    \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -364,18 +366,18 @@ SetFrameListLen (
 Routine Description:\r
 \r
   Set the length of Frame List\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev    - USB2_HC_DEV \r
+  HcDev    - USB2_HC_DEV\r
   Length   - the required length of frame list\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS            Success\r
   EFI_INVALID_PARAMETER  Invalid parameter\r
   EFI_DEVICE_ERROR       Fail\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -428,14 +430,14 @@ SetFrameListBaseAddr (
 Routine Description:\r
 \r
   Set base address of frame list first entry\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev        - USB2_HC_DEV \r
+  HcDev        - USB2_HC_DEV\r
   FrameBuffer  - base address of first entry of frame list\r
-  \r
+\r
 Returns:\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -474,17 +476,17 @@ SetAsyncListAddr (
 Routine Description:\r
 \r
   Set address of first Async schedule Qh\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   QhPtr   - A pointer to first Qh in the Async schedule\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-    \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -512,16 +514,16 @@ SetCtrlDataStructSeg (
 Routine Description:\r
 \r
   Set register of control and data structure segment\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev  - USB2_HC_DEV \r
-  \r
+  HcDev  - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-  \r
+\r
 \r
 --*/\r
 {\r
@@ -550,16 +552,16 @@ SetPortRoutingEhc (
 Routine Description:\r
 \r
   Set Ehc port routing bit\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-    \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -601,16 +603,16 @@ SetEhcDoorbell (
 Routine Description:\r
 \r
   Set Ehc door bell bit\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-     \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -652,16 +654,16 @@ ClearEhcAllStatus (
 Routine Description:\r
 \r
   Clear Ehc all status bits\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-     \r
+\r
 --*/\r
 {\r
   UINT32  UsbStatusAddr;\r
@@ -684,16 +686,16 @@ EnablePeriodicSchedule (
 Routine Description:\r
 \r
   Enable periodic schedule\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-   \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -735,16 +737,16 @@ DisablePeriodicSchedule (
 Routine Description:\r
 \r
   Disable periodic schedule\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-   \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -784,16 +786,16 @@ EnableAsynchronousSchedule (
 Routine Description:\r
 \r
   Enable asynchrounous schedule\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-    \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -835,16 +837,16 @@ DisableAsynchronousSchedule (
 Routine Description:\r
 \r
   Disable asynchrounous schedule\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-   \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -884,16 +886,16 @@ ResetEhc (
 Routine Description:\r
 \r
   Reset Ehc\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-   \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -935,16 +937,16 @@ StartScheduleExecution (
 Routine Description:\r
 \r
   Start Ehc schedule execution\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   EFI_SUCCESS       Success\r
   EFI_DEVICE_ERROR  Fail\r
-   \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -986,16 +988,16 @@ IsFrameListProgrammable (
 Routine Description:\r
 \r
   Whether frame list is programmable\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE   Programmable\r
   FALSE  Unprogrammable\r
-  \r
+\r
 --*/\r
 {\r
   BOOLEAN Value;\r
@@ -1028,16 +1030,16 @@ IsPeriodicScheduleEnabled (
 Routine Description:\r
 \r
   Whether periodic schedule is enabled\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE    Enabled\r
   FALSE   Disabled\r
-  \r
+\r
 --*/\r
 {\r
   BOOLEAN Value;\r
@@ -1070,16 +1072,16 @@ IsAsyncScheduleEnabled (
 Routine Description:\r
 \r
   Whether asynchronous schedule is enabled\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE   Enabled\r
   FALSE  Disabled\r
-  \r
+\r
 --*/\r
 {\r
   BOOLEAN Value;\r
@@ -1113,16 +1115,16 @@ IsEhcPortEnabled (
 Routine Description:\r
 \r
   Whether port is enabled\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE   Enabled\r
   FALSE  Disabled\r
-  \r
+\r
 --*/\r
 {\r
   UINT32  PortStatusControlAddr;\r
@@ -1148,16 +1150,16 @@ IsEhcReseted (
 Routine Description:\r
 \r
   Whether Ehc is reseted\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE   Reseted\r
   FALSE  Unreseted\r
-  \r
+\r
 --*/\r
 {\r
   BOOLEAN Value;\r
@@ -1190,16 +1192,16 @@ IsEhcHalted (
 Routine Description:\r
 \r
   Whether Ehc is halted\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE   Halted\r
   FALSE  Not halted\r
-  \r
+\r
 --*/\r
 {\r
   BOOLEAN Value;\r
@@ -1232,16 +1234,16 @@ IsEhcSysError (
 Routine Description:\r
 \r
   Whether Ehc is system error\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE   System error\r
   FALSE  No system error\r
-  \r
+\r
 --*/\r
 {\r
   BOOLEAN Value;\r
@@ -1268,29 +1270,29 @@ Returns:
 BOOLEAN\r
 IsHighSpeedDevice (\r
   IN EFI_USB2_HC_PROTOCOL *This,\r
-  IN UINT8                PortNum \r
+  IN UINT8                PortNum\r
   )\r
 /*++\r
 \r
 Routine Description:\r
 \r
   Whether high speed device attached\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev - USB2_HC_DEV \r
-  \r
+  HcDev - USB2_HC_DEV\r
+\r
 Returns:\r
 \r
   TRUE   High speed\r
   FALSE  Full speed\r
-  \r
+\r
 --*/\r
 {\r
   USB2_HC_DEV          *HcDev;\r
   UINT32               PortStatusControlAddr;\r
   UINT32               PortStatusControlReg;\r
-  \r
+\r
   HcDev = USB2_HC_DEV_FROM_THIS (This);\r
   PortStatusControlAddr = (UINT32) (PORTSC + (4 * PortNum));\r
 \r
@@ -1360,17 +1362,17 @@ WaitForEhcReset (
 Routine Description:\r
 \r
   wait for Ehc reset or timeout\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1406,17 +1408,17 @@ WaitForEhcHalt (
 Routine Description:\r
 \r
   wait for Ehc halt or timeout\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1452,17 +1454,17 @@ WaitForEhcNotHalt (
 Routine Description:\r
 \r
   wait for Ehc not halt or timeout\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1498,17 +1500,17 @@ WaitForAsyncScheduleEnable (
 Routine Description:\r
 \r
   Wait for Ehc asynchronous schedule enable or timeout\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1544,17 +1546,17 @@ WaitForAsyncScheduleDisable (
 Routine Description:\r
 \r
   Wait for Ehc asynchronous schedule disable or timeout\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1590,17 +1592,17 @@ WaitForPeriodicScheduleEnable (
 Routine Description:\r
 \r
   Wait for Ehc periodic schedule enable or timeout\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1636,17 +1638,17 @@ WaitForPeriodicScheduleDisable (
 Routine Description:\r
 \r
   Wait for periodic schedule disable or timeout\r
-  \r
+\r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
-  \r
+\r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1685,14 +1687,14 @@ Routine Description:
 \r
 Arguments:\r
 \r
-  HcDev   - USB2_HC_DEV \r
+  HcDev   - USB2_HC_DEV\r
   Timeout - timeout threshold\r
 \r
 Returns:\r
 \r
   EFI_SUCCESS    Success\r
   EFI_TIMEOUT    Timeout\r
-  \r
+\r
 --*/\r
 {\r
   EFI_STATUS  Status;\r
@@ -1702,7 +1704,7 @@ Returns:
 \r
   UsbCommandAddr  = USBCMD;\r
   Delay           = (Timeout / 50) + 1;\r
-  \r
+\r
   do {\r
     Status = ReadEhcOperationalReg (\r
                HcDev,\r