/*++\r
\r
-Copyright (c) 2006, Intel Corporation \r
-All rights reserved. This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2006 - 2007, Intel Corporation\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
Module Name:\r
\r
PciEnumerator.c\r
- \r
+\r
Abstract:\r
\r
PCI Bus Driver\r
\r
--*/\r
\r
-#include "Pcibus.h"\r
+#include "pcibus.h"\r
#include "PciEnumerator.h"\r
#include "PciResourceSupport.h"\r
#include "PciOptionRomSupport.h"\r
\r
Routine Description:\r
\r
- This routine is used to enumerate entire pci bus system \r
+ This routine is used to enumerate entire pci bus system\r
in a given platform\r
\r
Arguments:\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- \r
+\r
//\r
// Submit the resource request\r
//\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- \r
+\r
//\r
// Process P2C\r
//\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- \r
+\r
//\r
// Process attributes for devices on this host bridge\r
//\r
while (CurrentLink && CurrentLink != &Bridge->ChildList) {\r
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
if (!IsListEmpty (&Temp->ChildList)) {\r
- \r
+\r
//\r
// Go further to process the option rom under this bridge\r
//\r
}\r
\r
if (Temp->RomSize != 0 && Temp->RomSize <= MaxLength) {\r
- \r
+\r
//\r
// Load and process the option rom\r
//\r
\r
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);\r
\r
- Status = PciRootBridgeIo->Pci.Write (\r
+ Status = PciRootBridgeIoWrite (\r
PciRootBridgeIo,\r
+ &Pci,\r
EfiPciWidthUint16,\r
Address,\r
1,\r
// Initialize SubBusNumber to SecondBus\r
//\r
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);\r
- Status = PciRootBridgeIo->Pci.Write (\r
+ Status = PciRootBridgeIoWrite (\r
PciRootBridgeIo,\r
+ &Pci,\r
EfiPciWidthUint8,\r
Address,\r
1,\r
if (IS_PCI_BRIDGE (&Pci)) {\r
\r
Register8 = 0xFF;\r
- Status = PciRootBridgeIo->Pci.Write (\r
+ Status = PciRootBridgeIoWrite (\r
PciRootBridgeIo,\r
+ &Pci,\r
EfiPciWidthUint8,\r
Address,\r
1,\r
\r
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);\r
\r
- Status = PciRootBridgeIo->Pci.Write (\r
+ Status = PciRootBridgeIoWrite (\r
PciRootBridgeIo,\r
+ &Pci,\r
EfiPciWidthUint8,\r
Address,\r
1,\r
// Here is the point where PCI bus driver calls HOST bridge allocation protocol\r
// Currently we hardcoded for ea815\r
//\r
- \r
+\r
if (Attributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) {\r
RootBridgeDev->Decodes |= EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED;\r
}\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Get Max Option Rom size on this bridge\r
\r
Arguments:\r
while (CurrentLink && CurrentLink != &Bridge->ChildList) {\r
Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
if (!IsListEmpty (&Temp->ChildList)) {\r
- \r
+\r
//\r
// Get max option rom size under this bridge\r
//\r
}\r
\r
} else {\r
- \r
+\r
//\r
// For devices get the rom size directly\r
//\r
TempOptionRomSize = Temp->RomSize;\r
}\r
- \r
+\r
//\r
// Get the largest rom size on this bridge\r
//\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Process attributes of devices on this host bridge\r
\r
Arguments:\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Get resource allocation status from the ACPI pointer\r
\r
Arguments:\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Remove a PCI device from device pool and mark its bar\r
\r
Arguments:\r
//\r
InitializeP2C (PciDevice);\r
}\r
- \r
+\r
//\r
// Remove the device\r
//\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Determine whethter a PCI device can be rejected\r
\r
Arguments:\r
if (!Temp) {\r
return FALSE;\r
}\r
- \r
+\r
//\r
// PPB and RB should go ahead\r
//\r
if ((Temp->Parent) && (Temp->BusNumber == 0)) {\r
return FALSE;\r
}\r
- \r
+\r
//\r
// Skip VGA\r
//\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Get the larger resource consumer\r
\r
Arguments:\r
/*++\r
\r
Routine Description:\r
- \r
- Get the max resource consumer in the host resource pool \r
+\r
+ Get the max resource consumer in the host resource pool\r
\r
Arguments:\r
\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Adjust host bridge allocation so as to reduce resource requirement\r
\r
Arguments:\r
//\r
return EFI_ABORTED;\r
}\r
- \r
+\r
//\r
// Hostbridge hasn't enough resource\r
//\r
if (!PciResNode) {\r
continue;\r
}\r
- \r
+\r
//\r
// Check if the device has been removed before\r
//\r
continue;\r
}\r
}\r
- \r
+\r
//\r
// Remove the device if it isn't in the array\r
//\r
Status = RejectPciDevice (PciResNode->PciDev);\r
if (Status == EFI_SUCCESS) {\r
- \r
+\r
//\r
// Raise the EFI_IOB_EC_RESOURCE_CONFLICT status code\r
//\r
// Memory type aperture\r
//\r
case 0:\r
- \r
+\r
//\r
// Check to see the granularity\r
//\r
SubBusNumber = 0;\r
StartBusNumber = 0;\r
PciIo = &(BridgeDev->PciIo);\r
- Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0x19, 1, &StartBusNumber);\r
+ Status = PciIoRead (PciIo, EfiPciIoWidthUint8, 0x19, 1, &StartBusNumber);\r
\r
if (EFI_ERROR (Status)) {\r
return Status;\r
if (EFI_ERROR (Status)) {\r
return EFI_UNSUPPORTED;\r
}\r
- \r
+\r
//\r
// Get Root Brige Handle\r
//\r
Routine Description:\r
\r
Hot plug request notify.\r
- \r
+\r
Arguments:\r
\r
This - A pointer to the hot plug request protocol.\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Arguments:\r
\r
Returns:\r
/*++\r
\r
Routine Description:\r
- \r
+\r
Arguments:\r
\r
Returns:\r