+++ /dev/null
-//++\r
-// Copyright (c) 2006, Intel Corporation \r
-// All rights reserved. This program and the accompanying materials \r
-// are licensed and made available under the terms and conditions of the BSD License \r
-// which accompanies this distribution. The full text of the license may be found at \r
-// http://opensource.org/licenses/bsd-license.php \r
-// \r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-// \r
-// Module Name:\r
-// \r
-// IpfCpuCore.i\r
-//\r
-// Abstract:\r
-// IPF CPU definitions\r
-//\r
-//--\r
-\r
-#ifndef _IPF_CPU_CORE_\r
-#define _IPF_CPU_CORE_\r
-\r
-#define PEI_BSP_STORE_SIZE 0x4000\r
-#define ResetFn 0x00\r
-#define MachineCheckFn 0x01\r
-#define InitFn 0x02\r
-#define RecoveryFn 0x03\r
-#define GuardBand 0x10 \r
-\r
-//\r
-// Define hardware RSE Configuration Register\r
-//\r
-\r
-//\r
-// RS Configuration (RSC) bit field positions\r
-//\r
-#define RSC_MODE 0\r
-#define RSC_PL 2\r
-#define RSC_BE 4\r
-//\r
-// RSC bits 5-15 reserved\r
-//\r
-#define RSC_MBZ0 5\r
-#define RSC_MBZ0_V 0x3ff\r
-#define RSC_LOADRS 16\r
-#define RSC_LOADRS_LEN 14\r
-//\r
-// RSC bits 30-63 reserved\r
-//\r
-#define RSC_MBZ1 30\r
-#define RSC_MBZ1_V 0x3ffffffffULL\r
-\r
-//\r
-// RSC modes\r
-//\r
-\r
-//\r
-// Lazy\r
-//\r
-#define RSC_MODE_LY (0x0)\r
-//\r
-// Store intensive\r
-//\r
-#define RSC_MODE_SI (0x1)\r
-//\r
-// Load intensive\r
-//\r
-#define RSC_MODE_LI (0x2)\r
-//\r
-// Eager\r
-//\r
-#define RSC_MODE_EA (0x3)\r
-\r
-//\r
-// RSC Endian bit values\r
-//\r
-#define RSC_BE_LITTLE 0\r
-#define RSC_BE_BIG 1\r
-\r
-//\r
-// RSC while in kernel: enabled, little endian, pl = 0, eager mode\r
-//\r
-#define RSC_KERNEL ((RSC_MODE_EA<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))\r
-//\r
-// Lazy RSC in kernel: enabled, little endian, pl = 0, lazy mode\r
-//\r
-#define RSC_KERNEL_LAZ ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))\r
-//\r
-// RSE disabled: disabled, pl = 0, little endian, eager mode\r
-//\r
-#define RSC_KERNEL_DISABLED ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))\r
-\r
-#endif\r