Make MDE and EdkModule packages avoid all Intel IPF compiler warnings except waning...

[mirror_edk2.git] / EdkModulePkg / Universal / Ebc / Dxe / Ipf / EbcSupport.c

diff --git a/EdkModulePkg/Universal/Ebc/Dxe/Ipf/EbcSupport.c b/EdkModulePkg/Universal/Ebc/Dxe/Ipf/EbcSupport.c
index ea4308e263870cb07029909fc2043223d383a658..279f4202b659cdcb9e2cc61db364bd359840b158 100644 (file)
--- a/EdkModulePkg/Universal/Ebc/Dxe/Ipf/EbcSupport.c
+++ b/EdkModulePkg/Universal/Ebc/Dxe/Ipf/EbcSupport.c
@@ -32,12 +32,6 @@ Abstract:
 //\r
 #define EBC_THUNK_ALIGNMENT 16\r
 \r
-//\r
-// Per the IA-64 Software Conventions and Runtime Architecture Guide,\r
-// section 3.3.4, IPF stack must always be 16-byte aligned.\r
-//\r
-#define IPF_STACK_ALIGNMENT 16\r
-\r
 //\r
 // Opcodes for IPF instructions. We'll need to hand-create thunk code (stuffing\r
 // bits) to insert a jump to the interpreter.\r
@@ -82,6 +76,7 @@ PushU64 (
   *(UINT64 *) VmPtr->R[0] = Arg;\r
 }\r
 \r
+STATIC\r
 UINT64\r
 EbcInterpret (\r
   UINT64      Arg1,\r
@@ -194,6 +189,7 @@ EbcInterpret (
   return (UINT64) VmContext.R[7];\r
 }\r
 \r
+STATIC\r
 UINT64\r
 ExecuteEbcImageEntryPoint (\r
   IN EFI_HANDLE           ImageHandle,\r
@@ -474,14 +470,14 @@ Returns:
   //\r
   // Next is jumbled data, including opcode and rest of address\r
   //\r
-  Code[2] = LShiftU64 (Imm7b, 13)\r
-          | LShiftU64 (0x00, 20)   // vc\r
-          | LShiftU64 (Ic, 21)\r
-          | LShiftU64 (Imm5c, 22)\r
-          | LShiftU64 (Imm9d, 27)\r
-          | LShiftU64 (I, 36)\r
-          | LShiftU64 ((UINT64)MOVL_OPCODE, 37)\r
-          | LShiftU64 ((RegNum & 0x7F), 6);\r
+  Code[2] = LShiftU64 (Imm7b, 13);\r
+  Code[2] = Code[2] | LShiftU64 (0x00, 20);   // vc\r
+  Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
+  Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
+  Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
+  Code[2] = Code[2] | LShiftU64 (I, 36);\r
+  Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
+  Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
 \r
   WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
 \r
@@ -539,14 +535,14 @@ Returns:
   //\r
   // Next is jumbled data, including opcode and rest of address\r
   //\r
-  Code[2] = LShiftU64 (Imm7b, 13)\r
-          | LShiftU64 (0x00, 20)   // vc\r
-          | LShiftU64 (Ic, 21)\r
-          | LShiftU64 (Imm5c, 22)\r
-          | LShiftU64 (Imm9d, 27)\r
-          | LShiftU64 (I, 36)\r
-          | LShiftU64 ((UINT64)MOVL_OPCODE, 37)\r
-          | LShiftU64 ((RegNum & 0x7F), 6);\r
+  Code[2] = LShiftU64 (Imm7b, 13);\r
+  Code[2] = Code[2] | LShiftU64 (0x00, 20);   // vc\r
+  Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
+  Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
+  Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
+  Code[2] = Code[2] | LShiftU64 (I, 36);\r
+  Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
+  Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
 \r
   WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
 \r
@@ -610,14 +606,14 @@ Returns:
   //\r
   // Next is jumbled data, including opcode and rest of address\r
   //\r
-  Code[2] =   LShiftU64(Imm7b, 13)\r
-          | LShiftU64 (0x00, 20)   // vc\r
-          | LShiftU64 (Ic, 21)\r
-          | LShiftU64 (Imm5c, 22)\r
-          | LShiftU64 (Imm9d, 27)\r
-          | LShiftU64 (I, 36)\r
-          | LShiftU64 ((UINT64)MOVL_OPCODE, 37)\r
-          | LShiftU64 ((RegNum & 0x7F), 6);\r
+  Code[2] =   LShiftU64(Imm7b, 13);\r
+  Code[2] = Code[2] | LShiftU64 (0x00, 20);   // vc\r
+  Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
+  Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
+  Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
+  Code[2] = Code[2] | LShiftU64 (I, 36);\r
+  Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
+  Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
 \r
   WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
 \r
@@ -728,8 +724,11 @@ Returns:
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
-  Low64   = LShiftU64 (Slot1, 46) | LShiftU64 (Slot0, 5) | Template;\r
-  High64  = RShiftU64 (Slot1, 18) | LShiftU64 (Slot2, 23);\r
+  Low64   = LShiftU64 (Slot1, 46);\r
+  Low64   = Low64 | LShiftU64 (Slot0, 5) | Template;\r
+\r
+  High64  = RShiftU64 (Slot1, 18);\r
+  High64  = High64 | LShiftU64 (Slot2, 23);\r
 \r
   //\r
   // Now write it all out\r
@@ -822,14 +821,13 @@ Returns:
   CodeTwo5c = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 45) & 0x1F;\r
   CodeTwo9d = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 50) & 0x1FF;\r
 \r
-  TargetEbcAddr = CodeTwo7b\r
-                  | LShiftU64 (CodeTwo9d, 7)\r
-                  | LShiftU64 (CodeTwo5c, 16)\r
-                  | LShiftU64 (CodeTwoIc, 21)\r
-                  | LShiftU64 (CodeOne18, 22)\r
-                  | LShiftU64 (CodeOne23, 40)\r
-                  | LShiftU64 (CodeTwoI, 63)\r
-                  ;\r
+  TargetEbcAddr = CodeTwo7b;\r
+  TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwo9d, 7);\r
+  TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwo5c, 16);\r
+  TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwoIc, 21);\r
+  TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeOne18, 22);\r
+  TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeOne23, 40);\r
+  TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwoI, 63);\r
 \r
 Action:\r
   if (IsThunk == 1){\r
@@ -899,8 +897,8 @@ Returns:
   //\r
   FrameSize   = (UINTN) FramePtr - (UINTN) EbcSp + 64;\r
   Source      = (VOID *) EbcSp;\r
-  Destination = (VOID *) ((UINT8 *) EbcSp - FrameSize - IPF_STACK_ALIGNMENT);\r
-  Destination = (VOID *) ((UINTN) ((UINTN) Destination + IPF_STACK_ALIGNMENT - 1) &~((UINTN) IPF_STACK_ALIGNMENT - 1));\r
+  Destination = (VOID *) ((UINT8 *) EbcSp - FrameSize - CPU_STACK_ALIGNMENT);\r
+  Destination = (VOID *) ((UINTN) ((UINTN) Destination + CPU_STACK_ALIGNMENT - 1) &~((UINTN) CPU_STACK_ALIGNMENT - 1));\r
   gBS->CopyMem (Destination, Source, FrameSize);\r
   EbcAsmLLCALLEX ((UINTN) CallAddr, (UINTN) Destination);\r
 }\r