\r
#include "EbcInt.h"\r
#include "EbcExecute.h"\r
-\r
-#define VM_STACK_SIZE (1024 * 32)\r
-\r
-#define EBC_THUNK_SIZE 128\r
-\r
-//\r
-// For code execution, thunks must be aligned on 16-byte boundary\r
-//\r
-#define EBC_THUNK_ALIGNMENT 16\r
-\r
-//\r
-// Opcodes for IPF instructions. We'll need to hand-create thunk code (stuffing\r
-// bits) to insert a jump to the interpreter.\r
-//\r
-#define OPCODE_NOP (UINT64) 0x00008000000\r
-#define OPCODE_BR_COND_SPTK_FEW (UINT64) 0x00100000000\r
-#define OPCODE_MOV_BX_RX (UINT64) 0x00E00100000\r
-\r
-//\r
-// Opcode for MOVL instruction\r
-//\r
-#define MOVL_OPCODE 0x06\r
-\r
-VOID\r
-EbcAsmLLCALLEX (\r
- IN UINTN CallAddr,\r
- IN UINTN EbcSp\r
- );\r
+#include "EbcSupport.h"\r
\r
STATIC\r
EFI_STATUS\r
*(UINT64 *) VmPtr->R[0] = Arg;\r
}\r
\r
+STATIC\r
UINT64\r
EbcInterpret (\r
UINT64 Arg1,\r
return (UINT64) VmContext.R[7];\r
}\r
\r
+STATIC\r
UINT64\r
ExecuteEbcImageEntryPoint (\r
IN EFI_HANDLE ImageHandle,\r
UINT64 *Data64Ptr;\r
UINT32 ThunkSize;\r
UINT32 Size;\r
- EFI_STATUS Status;\r
\r
//\r
// Check alignment of pointer to EBC code, which must always be aligned\r
//\r
Size = EBC_THUNK_SIZE + EBC_THUNK_ALIGNMENT - 1;\r
ThunkSize = Size;\r
- Status = gBS->AllocatePool (\r
- EfiBootServicesData,\r
- Size,\r
- (VOID *) &Ptr\r
- );\r
- if (Status != EFI_SUCCESS) {\r
+ Ptr = AllocatePool (Size);\r
+\r
+ if (Ptr == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
//\r
//\r
// Next is jumbled data, including opcode and rest of address\r
//\r
- Code[2] = LShiftU64 (Imm7b, 13)\r
- | LShiftU64 (0x00, 20) // vc\r
- | LShiftU64 (Ic, 21)\r
- | LShiftU64 (Imm5c, 22)\r
- | LShiftU64 (Imm9d, 27)\r
- | LShiftU64 (I, 36)\r
- | LShiftU64 ((UINT64)MOVL_OPCODE, 37)\r
- | LShiftU64 ((RegNum & 0x7F), 6);\r
+ Code[2] = LShiftU64 (Imm7b, 13);\r
+ Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
+ Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
+ Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
+ Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
+ Code[2] = Code[2] | LShiftU64 (I, 36);\r
+ Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
+ Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
\r
WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
\r
//\r
// Next is jumbled data, including opcode and rest of address\r
//\r
- Code[2] = LShiftU64 (Imm7b, 13)\r
- | LShiftU64 (0x00, 20) // vc\r
- | LShiftU64 (Ic, 21)\r
- | LShiftU64 (Imm5c, 22)\r
- | LShiftU64 (Imm9d, 27)\r
- | LShiftU64 (I, 36)\r
- | LShiftU64 ((UINT64)MOVL_OPCODE, 37)\r
- | LShiftU64 ((RegNum & 0x7F), 6);\r
+ Code[2] = LShiftU64 (Imm7b, 13);\r
+ Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
+ Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
+ Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
+ Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
+ Code[2] = Code[2] | LShiftU64 (I, 36);\r
+ Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
+ Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
\r
WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
\r
//\r
// Next is jumbled data, including opcode and rest of address\r
//\r
- Code[2] = LShiftU64(Imm7b, 13)\r
- | LShiftU64 (0x00, 20) // vc\r
- | LShiftU64 (Ic, 21)\r
- | LShiftU64 (Imm5c, 22)\r
- | LShiftU64 (Imm9d, 27)\r
- | LShiftU64 (I, 36)\r
- | LShiftU64 ((UINT64)MOVL_OPCODE, 37)\r
- | LShiftU64 ((RegNum & 0x7F), 6);\r
+ Code[2] = LShiftU64(Imm7b, 13);\r
+ Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
+ Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
+ Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
+ Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
+ Code[2] = Code[2] | LShiftU64 (I, 36);\r
+ Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
+ Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
\r
WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Low64 = LShiftU64 (Slot1, 46) | LShiftU64 (Slot0, 5) | Template;\r
- High64 = RShiftU64 (Slot1, 18) | LShiftU64 (Slot2, 23);\r
+ Low64 = LShiftU64 (Slot1, 46);\r
+ Low64 = Low64 | LShiftU64 (Slot0, 5) | Template;\r
+\r
+ High64 = RShiftU64 (Slot1, 18);\r
+ High64 = High64 | LShiftU64 (Slot2, 23);\r
\r
//\r
// Now write it all out\r
CodeTwo5c = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 45) & 0x1F;\r
CodeTwo9d = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 50) & 0x1FF;\r
\r
- TargetEbcAddr = CodeTwo7b\r
- | LShiftU64 (CodeTwo9d, 7)\r
- | LShiftU64 (CodeTwo5c, 16)\r
- | LShiftU64 (CodeTwoIc, 21)\r
- | LShiftU64 (CodeOne18, 22)\r
- | LShiftU64 (CodeOne23, 40)\r
- | LShiftU64 (CodeTwoI, 63)\r
- ;\r
+ TargetEbcAddr = CodeTwo7b;\r
+ TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwo9d, 7);\r
+ TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwo5c, 16);\r
+ TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwoIc, 21);\r
+ TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeOne18, 22);\r
+ TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeOne23, 40);\r
+ TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwoI, 63);\r
\r
Action:\r
if (IsThunk == 1){\r
Source = (VOID *) EbcSp;\r
Destination = (VOID *) ((UINT8 *) EbcSp - FrameSize - CPU_STACK_ALIGNMENT);\r
Destination = (VOID *) ((UINTN) ((UINTN) Destination + CPU_STACK_ALIGNMENT - 1) &~((UINTN) CPU_STACK_ALIGNMENT - 1));\r
- gBS->CopyMem (Destination, Source, FrameSize);\r
+ CopyMem (Destination, Source, FrameSize);\r
EbcAsmLLCALLEX ((UINTN) CallAddr, (UINTN) Destination);\r
}\r