Revert "EmbeddedPkg/Lan9118Dxe: use MemoryFence"

[mirror_edk2.git] / EmbeddedPkg / Drivers / Lan9118Dxe / Lan9118DxeUtil.c

diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
index 3ef98ef901b9a9d0fbea88ff54e6b3d395256d3c..bd20eebd042dd1fe9a0b591fc57350b43362c29c 100644 (file)
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
@@ -236,7 +236,7 @@ IndirectEEPROMRead32 (
 \r
   // Write to Eeprom command register\r
   MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);\r
-  MemoryFence();\r
+  gBS->Stall (LAN9118_STALL);\r
 \r
   // Wait until operation has completed\r
   while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
@@ -284,7 +284,7 @@ IndirectEEPROMWrite32 (
 \r
   // Write to Eeprom command register\r
   MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);\r
-  MemoryFence();\r
+  gBS->Stall (LAN9118_STALL);\r
 \r
   // Wait until operation has completed\r
   while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
@@ -362,14 +362,13 @@ Lan9118Initialize (
   if (((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {\r
     DEBUG ((DEBUG_NET, "Waking from reduced power state.\n"));\r
     MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
   // Check that device is active\r
   Retries = 20;\r
   while ((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Retries) {\r
     gBS->Stall (LAN9118_STALL);\r
-    MemoryFence();\r
   }\r
   if (!Retries) {\r
     return EFI_TIMEOUT;\r
@@ -379,7 +378,6 @@ Lan9118Initialize (
   Retries = 20;\r
   while ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Retries){\r
     gBS->Stall (LAN9118_STALL);\r
-    MemoryFence();\r
   }\r
   if (!Retries) {\r
     return EFI_TIMEOUT;\r
@@ -449,12 +447,11 @@ SoftReset (
 \r
   // Write the configuration\r
   MmioWrite32 (LAN9118_HW_CFG, HwConf);\r
-  MemoryFence();\r
+  gBS->Stall (LAN9118_STALL);\r
 \r
   // Wait for reset to complete\r
   while (MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {\r
 \r
-    MemoryFence();\r
     gBS->Stall (LAN9118_STALL);\r
     ResetTime += 1;\r
 \r
@@ -503,7 +500,7 @@ PhySoftReset (
 \r
     // Wait for completion\r
     while (MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {\r
-      MemoryFence();\r
+      gBS->Stall (LAN9118_STALL);\r
     }\r
   // PHY Basic Control Register reset\r
   } else if (Flags & PHY_RESET_BCR) {\r
@@ -511,7 +508,7 @@ PhySoftReset (
 \r
     // Wait for completion\r
     while (IndirectPHYRead32 (PHY_INDEX_BASIC_CTRL) & PHYCR_RESET) {\r
-      MemoryFence();\r
+      gBS->Stall (LAN9118_STALL);\r
     }\r
   }\r
 \r
@@ -545,7 +542,7 @@ ConfigureHardware (
 \r
     // Write the configuration\r
     MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
   return EFI_SUCCESS;\r
@@ -588,7 +585,6 @@ AutoNegotiate (
     // Wait until it is up or until Time Out\r
     Retries = FixedPcdGet32 (PcdLan9118DefaultNegotiationTimeout) / LAN9118_STALL;\r
     while ((IndirectPHYRead32 (PHY_INDEX_BASIC_STATUS) & PHYSTS_LINK_STS) == 0) {\r
-      MemoryFence();\r
       gBS->Stall (LAN9118_STALL);\r
       Retries--;\r
       if (!Retries) {\r
@@ -675,7 +671,7 @@ StopTx (
     TxCfg = MmioRead32 (LAN9118_TX_CFG);\r
     TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;\r
     MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
   // Check if already stopped\r
@@ -694,7 +690,7 @@ StopTx (
     if (TxCfg & TXCFG_TX_ON) {\r
       TxCfg |= TXCFG_STOP_TX;\r
       MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
-      MemoryFence();\r
+      gBS->Stall (LAN9118_STALL);\r
 \r
       // Wait for Tx to finish transmitting\r
       while (MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);\r
@@ -729,7 +725,7 @@ StopRx (
     RxCfg = MmioRead32 (LAN9118_RX_CFG);\r
     RxCfg |= RXCFG_RX_DUMP;\r
     MmioWrite32 (LAN9118_RX_CFG, RxCfg);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
 \r
     while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);\r
   }\r
@@ -755,28 +751,28 @@ StartTx (
     TxCfg = MmioRead32 (LAN9118_TX_CFG);\r
     TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;\r
     MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
   // Check if tx was started from MAC and enable if not\r
   if (Flags & START_TX_MAC) {\r
     MacCsr = IndirectMACRead32 (INDIRECT_MAC_INDEX_CR);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
     if ((MacCsr & MACCR_TX_EN) == 0) {\r
       MacCsr |= MACCR_TX_EN;\r
       IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);\r
-      MemoryFence();\r
+      gBS->Stall (LAN9118_STALL);\r
     }\r
   }\r
 \r
   // Check if tx was started from TX_CFG and enable if not\r
   if (Flags & START_TX_CFG) {\r
     TxCfg = MmioRead32 (LAN9118_TX_CFG);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
     if ((TxCfg & TXCFG_TX_ON) == 0) {\r
       TxCfg |= TXCFG_TX_ON;\r
       MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
-      MemoryFence();\r
+      gBS->Stall (LAN9118_STALL);\r
     }\r
   }\r
 \r
@@ -806,14 +802,14 @@ StartRx (
       RxCfg = MmioRead32 (LAN9118_RX_CFG);\r
       RxCfg |= RXCFG_RX_DUMP;\r
       MmioWrite32 (LAN9118_RX_CFG, RxCfg);\r
-      MemoryFence();\r
+      gBS->Stall (LAN9118_STALL);\r
 \r
       while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);\r
     }\r
 \r
     MacCsr |= MACCR_RX_EN;\r
     IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr);\r
-    MemoryFence();\r
+    gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
   return EFI_SUCCESS;\r
@@ -1003,7 +999,7 @@ ChangeFifoAllocation (
   HwConf &= ~(0xF0000);\r
   HwConf |= ((TxFifoOption & 0xF) << 16);\r
   MmioWrite32 (LAN9118_HW_CFG, HwConf);\r
-  MemoryFence();\r
+  gBS->Stall (LAN9118_STALL);\r
 \r
   return EFI_SUCCESS;\r
 }\r